Value Added

Compact Flash Ⅲ

Ⅲ

Ⅲ

Ⅲ series

AP-CFxxxxE3XR-XXXXXXK

2

© 2011 Apacer Technology Inc.

Rev. 1.0

Table of Contents

1. GENERAL DESCRIPTION ......................................................................................... 3

1.1.1 Power Management Unit (PMU)................................................................................................... 3

1.1.2 SRAM Buffer ................................................................................................................................. 3

2. FUNCTIONAL BLOCK ............................................................................................... 4

3. PIN ASSIGNMENTS ................................................................................................... 5

4. CAPACITY SPECIFICATION ..................................................................................... 7

5. FLASH MANAGEMENT ............................................................................................. 9

5.1.1 Advanced wear-leveling algorithms .............................................................................................. 9

5.1.2 S.M.A.R.T. technology.................................................................................................................. 9

5.1.3 Built-in hardware ECC .................................................................................................................. 9

5.1.4 Enhanced data integrity ................................................................................................................ 9

6. SOFTWARE INTERFACE ....................................................................................... 11

7. ELECTRICAL SPECIFICATION .............................................................................. 13

7.2.1 Attribute Memory Read Timing Specification ............................................................................. 16

7.2.2 Configuration Register (Attribute Memory) Write Specification .................................................. 17

7.2.3 Common Memory Read Timing Specification ............................................................................ 18

7.2.4 Common Memory Write Timing Specification ............................................................................ 19

7.2.5 I/O Input (Read) Timing Specification......................................................................................... 20

7.2.6 I/O Output (Write) Timing Specification ...................................................................................... 21

7.2.7 Ultra DMA Mode Data Transfer Input/Output (Read/Write) Timing ............................................ 22

7.2.8 Media Side Interface I/O Timing Specifications.......................................................................... 34

8. PHYSICAL CHARACTERISTICS ............................................................................ 37

9. PRODUCT ORDERING INFORMATION ................................................................. 38