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46DR16640A Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc

Part # 46DR16640A
Description  Clock frequency up to 400MHz
Download  28 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

46DR16640A Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc

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IS43/46DR81280A, IS43/46DR16640A  
Integrated Silicon Solution, Inc. – www.issi.com –
1
Rev. D, 08/30/2011
1Gb (x8, x16) DDR2 SDRAM
FEATURES 
 Clock frequency up to 400MHz 
 8 internal banks for concurrent operation 
 4‐bit prefetch architecture 
 Programmable CAS Latency: 3, 4, 5, 6 and 7 
 Programmable Additive Latency: 0, 1, 2, 3, 4, 5 
and 6 
 Write Latency = Read Latency‐1 
 Programmable Burst Sequence: Sequential or 
Interleave 
 Programmable Burst Length: 4 and 8 
 Automatic and Controlled Precharge Command 
 Power Down Mode 
 Auto Refresh and Self Refresh 
 Refresh Interval: 7.8 s (8192 cycles/64 ms) 
 OCD (Off‐Chip Driver Impedance Adjustment) 
 ODT (On‐Die Termination) 
 Weak Strength Data‐Output Driver Option 
 Bidirectional differential Data Strobe (Single‐
ended data‐strobe is an optional feature) 
 On‐Chip DLL aligns DQ and DQs transitions with 
CK transitions 
 DQS# can be disabled for single‐ended data 
strobe 
 Read Data Strobe supported (x8 only) 
 Differential clock inputs CK and CK# 
 VDD and VDDQ = 1.8V ± 0.1V 
 PASR (Partial Array Self Refresh) 
 SSTL_18 interface 
 tRAS lockout supported 
 Operating temperature: 
Commercial (T= 0°C to 70°C ; T= 0°C to 85°C) 
Industrial (T= ‐40°C to 85°C; T= ‐40°C to 95°C) 
Automotive, A1 (T= ‐40°C to 85°C; T= ‐40°C to 95°C) 
Automotive, A2 (T= ‐40°C to 105°C; T= ‐40°C to 
105°C)
 
OPTIONS  
 
 Configuration: 
 128Mx8 (16M x 8 x 8 banks) 
 64Mx16 (8M x 16 x 8 banks)  
 Package: 
 60‐ball TW‐BGA for x8 
 84‐ball TW‐BGA for x16 
 
ADDRESS TABLE 
Parameter
128Mx8 
64Mx16
Row Addressing
A0‐A13 
A0‐A12
Column Addressing
A0‐A9 
A0‐A9
Bank Addressing
BA0‐BA2 
BA0‐BA2
Precharge Addressing
A10 
A10
Clock Cycle Timing 
 
‐37C 
‐3D 
‐25E 
‐25D 
Units 
Speed Grade 
DDR2‐533C 
DDR2‐667D
DDR2‐800E
DDR2‐800D  
CL‐tRCD‐tRP 
4‐4‐4 
5‐5‐5
6‐6‐6
5‐5‐5
tCK 
tCK (CL=3) 
5
5
5
ns 
tCK (CL=4) 
3.75 
3.75
3.75
3.75
ns 
tCK (CL=5) 
3.75 
3
3
2.5
ns 
tCK (CL=6) 
3.75 
3
2.5
2.5
ns 
tCK (CL=7) 
3.75 
3
2.5
2.5
ns 
Frequency (max) 
266 
333
400
400
MHz 
Note: The ‐37C device specification is shown for reference only. 
SEPTEMBER 2011 
Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances


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