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VIPER25HD Datasheet(PDF) 16 Page - STMicroelectronics

Part No. VIPER25HD
Description  Off-line high voltage converters
Download  40 Pages
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VIPER25HD Datasheet(HTML) 16 Page - STMicroelectronics

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Operation description
Doc ID 15585 Rev 4
Power-up description
If the input voltage rises up till the device start level, VDRAIN_START, the VDD voltage begins to
grow due to the IDDch current (see Table 7 on page 7) coming from the internal high voltage
start-up circuit. If the VDD voltage reaches the VDDon threshold (See Table 7 on page 7) the
power MOSFET starts switching and the HV current generator is turned OFF, see Figure 23
on page 17.
The IC is powered by the energy stored in the capacitor on the VDD pin, CVDD, until when
the self-supply circuit (typically an auxiliary winding of the transformer and a steering diode)
develops a voltage high enough to sustain the operation.
CVDD capacitor must be sized enough to avoid fast discharge and keep the needed voltage
value higher than VDDoff threshold. In fact, a too low capacitance value could terminate the
switching operation before the controller receives any energy from the auxiliary winding.
The following formula can be used for the VDD capacitor calculation:
Equation 1
The tSSaux is the time needed for the steady state of the auxiliary voltage. This time is
estimated by applicator according to the output stage configurations (transformer, output
capacitances, etc.).
During normal operation, the power MOSFET is switched ON immediately after transformer
demagnetization, detected by the VIPER25, through the voltage VZCD sensed on the ZCD
pin. At power up the initial output voltage is zero and then the voltage VZCD is not high
enough to correctly arm the internal ZCD circuit. In this case, the power MOSFET is turned
ON with a fixed frequency determined by the internal oscillator. This fixed switching
frequency is FSTARTER (see Table 8 on page 8). As soon as the voltage on ZCD pin is able
to arm the ZCD circuit (i.e. its positive value exceeds VZCDAth), the turn-on of the power
MOSFET is driven by this circuit and is no more related to the internal oscillator (except for
the frequency fold-back function).
The start-up phase is managed by a dedicated internal logic and is activated every time the
device exits from UVLO because the VDD voltage exceeds the threshold VDDon. An internal
timing (tSU, see Table 8 on page 8) defines the end of the start-up phase.
During the first part of the start-up phase soft start takes place: the drain peak current is
increased cycle-by-cycle from zero as far as the maximum value, IDlim, (see Figure 24 or
Figure 25 on page 18). The duration of soft-start is tSS, (tSS < tSU, see Table 8 on page 8),
During soft-start and until the output voltage reaches its regulated value, the feedback loop
is open. To prevent an improper activation of the OLP function (see the Section 7.13 on
page 28) during soft-start and until the start-up phase is over (t = tSU), the feedback voltage
is clamped at VFBlin.(see Figure 24 on page 18).
In this way, the feedback voltage can exceed VFBlin and ramp up as far as the overload
threshold, VFBolp (see Figure 25 on page 18), which would activate the OLP function, only at
the end of the start-up phase (t > tSU) if the output voltage is still below the regulated value.

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