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ISL6277HRZ Datasheet(PDF) 19 Page - Intersil Corporation

Part # ISL6277HRZ
Description  Multiphase PWM Regulator for AMD Fusion??Mobile CPUs Using SVI 2.0
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6277HRZ Datasheet(HTML) 19 Page - Intersil Corporation

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ISL6277
19
FN8270.1
March 8, 2012
Modes of Operation
The Core VR can be configured for 3, 2- or 1-phase operation.
Table 1 shows Core VR configurations and operational modes,
programmed by the ISEN3 and ISEN2 pin status and the PSL0_L
& PSL1_L commands via the SVI 2 interface, see Table 9.
For a 2-phase configuration, tie the ISEN3 pin to 5V. In this
configuration, phases 1 and 2 are active. To select a 1-phase
configuration, tie the ISEN3 pin and the ISEN2 pin to 5V. In this
configuration, only phase-1 is active.
In a 3-phase configuration, the Core VR operates in 3-phase CCM,
with PSI0_L and PSI_L both high. If PSI0_L is taken low via the
SVI 2 interface, the Core VR sheds Phase 2 and Phase 3. Phase 1
enters Diode Emulation (DE) mode. When both PSI0_L and
PSI1_L are taken low, the Core VR continues to operate in
1-phase DE mode.
For 2-phase configurations, the Core VR operates in 2-phase CCM
with PSI0_L and PSI_L both high. If PSI0_L is taken low via the
SVI 2 interface, the Core VR sheds Phase 2 and the Core VR
enters 1-phase DE mode. When both PSI0_L and PSI1_L are
taken low, the Core VR continues to operate in 1-phase DE mode.
In a 1-phase configuration, the Core VR operates in 1-phase CCM
and enters 1-phase DE when PSI0_L is taken low and continues
to operate in this mode when both PSI0_l and PSI1_L are taken
low.
The Core VR can be disabled completely by connecting ISEN1 to
+5V.
ISL6277 Northbridge VR can be configured for 2- or 1-phase
operation. Table 2 shows the Northbridge VR configurations and
operational modes, which are programmed by the ISEN2_NB pin
status and the PSI0_L and PSI1_L bits of the SVI 2 command.
FIGURE 17. CURRENT BALANCING DURING DYNAMIC OPERATION.
CH1: IL1, CH2: ILOAD, CH3: IL2, CH4: IL3
REP RATE = 10kHz
REP RATE = 25kHz
REP RATE = 50kHz
REP RATE = 100kHz
REP RATE = 200kHz
TABLE 1. CORE VR MODES OF OPERATION
CONFIG.
ISEN3
ISEN2
PSL0_L
&
PSI1_L
MODE
OCP
THRESHOLD
(µA)
3-phase
Core VR
Config.
To Power
Stage
To Power
Stage
11
3-phase CCM
45
01
1-phase DE
00
1-phase DE
2-phase
Core VR
Config.
Tied to 5V To Power
Stage
11
2-phase CCM
45
01
1-phase DE
00
1-phase DE
1-phase
Core VR
Config.
Tied to 5V Tied to
5V
11
1-phase CMM
45
01
1-phase DE
00
1-phase DE
TABLE 2. NORTHBRIDGE VR MODES OF OPERATION
ISEN2_NB
CONFIG.
PSL0_L &
PSI1_L
MODE
OCP
THRESHOLD
To Power
Stage
2-phase NB
VR Config.
11
2-phase CCM
45µA
01
1-phase DE
00
1-phase DE
Tied to 5V
1-phase NB
VR Config.
11
1-phase CCM
45µA
01
1-phase DE
00
1-phase DE


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