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NP50P04SDG-E1 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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NP50P04SDG-E1 Datasheet(HTML) 3 Page - Renesas Technology Corp |
3 / 9 page The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. MOS FIELD EFFECT TRANSISTOR NP50P04SDG SWITCHING P-CHANNEL POWER MOSFET DATA SHEET Document No. D19072EJ2V0DS00 (2nd edition) Date Published March 2008 NS Printed in Japan 2007 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. DESCRIPTION The NP50P04SDG is P-channel MOS Field Effect Transistor designed for high current switching applications. ORDERING INFORMATION PART NUMBER LEAD PLATING PACKING PACKAGE NP50P04SDG-E1-AY Note NP50P04SDG-E2-AY Note Pure Sn (Tin) Tape 2500 p/reel TO-252 (MP-3ZK) Note Pb-free (This product does not contain Pb in external electrode.) FEATURES • Super low on-state resistance RDS(on)1 = 9.6 m Ω MAX. (VGS = −10 V, ID = −25 A) RDS(on)2 = 15 m Ω MAX. (VGS = −4.5 V, ID = −25 A) • Low input capacitance Ciss = 5000 pF TYP. ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Drain to Source Voltage (VGS = 0 V) VDSS −40 V Gate to Source Voltage (VDS = 0 V) VGSS m20 V Drain Current (DC) (TC = 25 °C) ID(DC) m50 A Drain Current (pulse) Note1 ID(pulse) m150 A Total Power Dissipation (TC = 25 °C) PT1 84 W Total Power Dissipation (TA = 25 °C) PT2 1.2 W Channel Temperature Tch 175 °C Storage Temperature Tstg −55 to +175 °C Single Avalanche Current Note2 IAS 37 A Single Avalanche Energy Note2 EAS 136 mJ Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Starting Tch = 25 °C, VDD = −20 V, RG = 25 Ω, VGS = −20 → 0 V THERMAL RESISTANCE Channel to Case Thermal Resistance Rth(ch-C) 1.78 °C/W Channel to Ambient Thermal Resistance Rth(ch-A) 125 °C/W (TO-252) <R> |
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