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DS2407V Datasheet(PDF) 8 Page - Dallas Semiconductor |
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DS2407V Datasheet(HTML) 8 Page - Dallas Semiconductor |
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8 / 31 page  DS2407 012099 8/31 The output transistors of both channels are controlled by their channel flip–flops. These flip–flops are accessi- ble through bit locations 5 and 6 of Status Memory address 7 as well as through the Channel Access com- mand. Setting a channel flip–flop to 0 will make the associated PIO–transistor conducting or on, setting the flip–flop to 1 will switch the transistor off. When powering up, the output transistors of both channels are non–con- ducting or off. They may change their status as the user–programmed power–on status is transferred into Status Memory location 7. Bit 7 of Status Memory Loca- tion 7 indicates if the DS2407 is connected to an exter- nal power supply. Without external supply this read– only bit will be 0. If the voltage applied to the VCC pin is high enough to keep the device powered up, this bit will be 1. The Status Memory is programmed similarly to the data memory. Details for reading and programming the sta- tus memory portion of the DS2407 are given in the Memory Function Commands section. MEMORY FUNCTION COMMANDS The “Memory Function Flow Chart” (Figure 6) describes the protocols necessary for accessing the various data fields and PIO channels within the DS2407. The Memory Function Control section, 8–bit scratchpad, and the Program Voltage Detect circuit combine to inter- pret the commands issued by the bus master and create the correct control signals within the device. A three– byte protocol is issued by the bus master. It is comprised of a command byte to determine the type of operation and two address bytes to determine the specific starting byte location within a data field or to supply and exchange setup and status data when accessing the PIO channels. The command byte indicates if the device is to be read or written or if the PIO channels are to be accessed. Writing data involves not only issuing the correct command sequence but also providing a 12–volt programming voltage at the appropriate times. To execute a write sequence, a byte of data is first loaded into the scratchpad and then programmed into the selected address. Write sequences always occur a byte at a time. To execute a read sequence, the starting address is issued by the bus master and data is read from the part beginning at that initial location and contin- uing to the end of the selected data field or until a reset sequence is issued. All bits transferred to the DS2407 and received back by the bus master are sent least sig- nificant bit first. READ MEMORY [F0h] The Read Memory command is used to read data from the 1024–bit EPROM data memory field. The bus mas- ter follows the command byte with a two–byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting byte location within the data field. Since the data memory contains 128 bytes, T15:T8 and T7 should all be zero. With every subsequent read data time slot the bus master receives data from the DS2407 starting at the initial address and continuing until the end of the 1024–bits data field is reached or until a Reset Pulse is issued. If reading occurs through the end of memory space, the bus master may issue sixteen additional read time slots and the DS2407 will respond with a 16–bit CRC of the command, address bytes and all data bytes read from the initial starting byte through the last byte of memory. This CRC is the result of clearing the CRC gen- erator and then shifting in the command byte followed by the two address bytes and the data bytes beginning at the first addressed memory location and continuing through to the last byte of the EPROM data memory. After the CRC is received by the bus master, any subse- quent read time slots will appear as logical 1s until a Reset Pulse is issued. Any reads ended by a Reset Pulse prior to reaching the end of memory will not have the 16–bit CRC available. Typically the software controlling the device should store a 16–bit CRC with each page of data to insure rapid, error–free data transfers that eliminate having to read a page multiple times to determine if the received data is correct or not. (See Book of DS19xx iButton Standards, Chapter 7 for the recommended file struc- ture to be used with the 1–Wire environment). If CRC values are imbedded within the data it is unnecessary to read the end–of–memory CRC. The Read Memory command can be ended at any point by issuing a Reset Pulse. |
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