DS2227

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select pins for each of the four banks of onboard memories (see Figure 1). For operation as a 512k x 8 NV

SRAM Stik, tie all data lines from each bank together (i.e., all D0s together, all D1s together, etc.). Read

enables and write enables are also tied together. For operation as a 256k x 16 NV SRAM Stik, tie the data

lines from two banks together. Chip enables, read enables, and write enables from these banks are also

tied together. Connection to the DS2227 is made by using an industry-standard, 72-position SIMM socket

DS9072-72V (AMP part number 821824-8). These SIMM sockets are also available in perpendicular,

inclined, or parallel mount, depending on the height available. See the DS907x SipStik

available from Dallas Semiconductor.

READ MODE

defines which byte of data is to be accessed. Valid data will be available to the eight data I/O pins within

address access.

WRITE MODE

DATA RETENTION MODE

support circuitry.

SRAM automatically write-protects itself, all inputs become “don’t care” and all outputs become high

the DS2227, the battery voltage is checked with a precision comparator. If the battery supply is less than

2.0 volts, the second memory access to the device is inhibited.

Battery status can, therefore, be

determined by a three-step process. First, a read cycle is performed to any location in memory, in order to

save the contents of that location. A subsequent write cycle can then be executed to the same memory

location, altering data. If the next read cycle fails to verify the written data, then the battery voltage is less

than 2.0V and data is in danger of being corrupted.

The DS2227 also provides battery redundancy. In many applications data integrity is paramount. The

DS2227 provides two batteries for each SRAM and an internal isolation switch to select between them.

During battery backup, the battery with the highest voltage is selected for use. If one battery fails, the

other automatically takes over. The switch between batteries is transparent to the user.