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DS1985-F5 Datasheet(PDF) 4 Page - Dallas Semiconductor |
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DS1985-F5 Datasheet(HTML) 4 Page - Dallas Semiconductor |
4 / 25 page DS1985 4 of 25 The 1-Wire CRC of the lasered ROM is generated using the polynomial X 8 + X5 + X4 + 1. Additional information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards. The shift register acting as the CRC accumulator is initialized to 0. Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC should return the shift register to all 0s. HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2 64-BIT LASERED ROM Figure 3 8-Bit CRC Code 48- Bit Serial Number 8-Bit Family Code (0BH) MSB LSB MSB LSB MSB LSB |
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