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DS1557P-100 Datasheet(PDF) 2 Page - Dallas Semiconductor |
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DS1557P-100 Datasheet(HTML) 2 Page - Dallas Semiconductor |
2 / 19 page DS1557 2 of 19 The RTC Registers are double-buffered into an internal and external set. The user has direct access to the external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow the user to access static data. Assuming the internal oscillator is turned on, the internal set of registers are continuously updated; this occurs regardless of external registers settings to guarantee that accurate RTC information is always maintained. The DS1557 has interrupt ( IRQ /FT) and reset ( RST ) outputs which can be used to control CPU activity. The IRQ /FT interrupt output can be used to generate an external interrupt when the RTC Register values match user programmed alarm values. The interrupt is always available while the device is powered from the system supply and can be programmed to occur when in the battery backed state to serve as a system wake-up. Either the IRQ /FT or RST outputs can also be used as a CPU watchdog timer, CPU activity is monitored and an interrupt or reset output will be activated if the correct activity is not detected within programmed limits. The DS1557 power-on reset can be used to detect a system power down or failure and hold the CPU in a safe reset state until normal power returns and stabilizes; the RST output is used for this function. The DS1557 also contains its own power-fail circuitry which automatically deselects the device when the VCC supply enters an out of tolerance condition. This feature provides a high degree of data security during unpredictable system operation brought on by low VCC levels. DS1557 BLOCK DIAGRAM Figure 1 |
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