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DS1077Z-125 Datasheet(PDF) 13 Page - Dallas Semiconductor
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DS1077Z-125 Datasheet(HTML) 13 Page - Dallas Semiconductor
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Data and control information is read from and written to the DS1077 in the format shown in Figure 3. To
write to the DS1077, the master will issue the slave address of the DS1077 and the R/
bit will be set to 0.
After receiving an acknowledge, the bus master provides a command protocol. After receiving this protocol,
the DS1077 will issue an acknowledge, and then the master may send data to the DS1077. If the DS1077 is
to be read, the master must send the command protocol as before, and then issue a repeat START condition
and then the control byte again, this time with the R/W bit set to 1 to allow reading of the data from the
DS1077. The command set for the DS1077 is as follows:
Access DIV 
is 0, this command writes to the DIV register. After issuing this command, the next data byte value
is to be written into the DIV register.
is 1, the next data byte read is the value stored in the DIV register.
Access MUX 
is 0, this command writes to the MUX register. After issuing this command, the next data byte value
is to be written into the MUX register.
is 1, the next data byte read is the value stored in the MUX register.
Access BUS [0D]
is 0, this command writes to the BUS register. After issuing this command, the next data byte value
is to be written into the BUS register.
is 1, the next data byte read is the value stored in the BUS register.
Write E2 [3F]
If WC = 0 the EEPROM is automatically written to at the end of each command. This is a DEFAULT
condition. In this case the command WRITE E2 is not needed.
If WC = 1, the EEPROM is only written when the WRITE E2 command is issued. On receipt of the WRITE
E2 command the contents of the DIV and MUX registers are written into the EEPROM, thus locking in the
EXCEPTION: The bus register is always automatically written to EEPROM after a write, regardless of the
value of WC.
To achieve best results, decouple the power supply with 0.01µF and 0.1µF high-quality, ceramic, surface-
mount capacitors as close as possible to V
/GND of the device. Surface-mount components minimize lead
inductance, which improves performance, and ceramic capacitors tend to have adequate high-frequency
response for decoupling applications.
The active supply current can be significantly reduced by disabling OUT0 when not required and setting its
prescaler to divide by 8. Likewise, bypassing OUT1’s divider (and using only the prescaler) also
significantly reduces the supply current.
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