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CS8126 Datasheet(PDF) 5 Page - Cherry Semiconductor Corporation

Part No. CS8126
Description  5V, 750mA Low Dropout Linear Regulator with Delayed RESET
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Maker  CHERRY [Cherry Semiconductor Corporation]
Homepage  http://www.cherrycorp.com/
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CS8126 Datasheet(HTML) 5 Page - Cherry Semiconductor Corporation

 
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5
The CS8126
function, has hysteresis on both the
Reset and Delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The
circuit output is an open collector type with
ON and OFF parameters as specified. The
output
NPN transistor is controlled by the two circuits described
(see Block Diagram).
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when the output
voltage falls below VRT(OFF), causes the
output tran-
sistor to be in the ON (saturation) state. When the output
voltage rises above VRT(ON), this circuit permits the
output transistor to go into the OFF state if allowed by
the
Delay circuit.
RESET Delay Circuit
This circuit provides a programmable (by external capaci-
tor) delay on the
output lead. The Delay lead pro-
vides source current to the external delay capacitor only
when the "Low Voltage Inhibit" circuit indicates that out-
put voltage is above VRT(ON). Otherwise, the Delay lead
sinks current to ground (used to discharge the delay
capacitor). The discharge current is latched ON when the
output voltage falls below VRT(OFF). The Delay capacitor is
fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled
pulse is generated following
detection of an error condition. The circuit allows
the
output transistor to go to the OFF (open) state
only when the voltage on the Delay lead is higher than
VDC(H1).
The Delay time for the
function is calculated from
the formula:
Delay time =
Delay time = CDelay ´ 3.2 ´ 105
If CDelay = 0.1µF, Delay time (ms) = 32ms ± 50%: i.e. 16ms
to 48ms. The tolerance of the capacitor must be taken into
account to calculate the total variation in the delay time.
CDelay ´ VDelay Threshold
ICharge
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET Circuit Waveform
VRH
VOUT
VRT(ON)
VRT(OFF)
VRL
Delay
VDC(HI)
VDC(LO)
VDH
tDelay
VDIS
(3)
(1)
(2)
(2)
RESET
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
Circuit Description


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