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CS51313GD16 Datasheet(PDF) 5 Page - Cherry Semiconductor Corporation

Part # CS51313GD16
Description  Synchronous CPU Buck Controller Capable of Implementing Multiple Linear Regulators
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Manufacturer  CHERRY [Cherry Semiconductor Corporation]
Direct Link  http://www.cherrycorp.com/
Logo CHERRY - Cherry Semiconductor Corporation

CS51313GD16 Datasheet(HTML) 5 Page - Cherry Semiconductor Corporation

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PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
General Electrical Specifications
VCC Monitor Start Threshold
7.9
8.4
8.9
V
VCC Monitor Stop Threshold
7.6
8.1
8.6
V
Hysteresis
Start - Stop
0.15
0.30
0.60
V
VCC Supply Current
No Load on GATE(H), GATE(L)
12
20
mA
Note 1: All pins are rated 2kV except for the VREF pin (Pin 5) which is typically rated at 800V.
Note 2: The IC power dissipation in a typical application with VCC = 12V, switching frequency fSW = 250kHz, 50nc
MOSFETs and RθJA = 115°C/W yields an operating junction temperature rise of approximately 52°C, and a junction tem-
perature of 77°C with an ambient temperature of 25°C.
Note 3: Guaranteed by design, not 100% tested in production.
Electrical Characteristics: 0˚C < TA < 70˚C; 0˚C < TJ < 125˚C; 9V < VCC < 14V;
2.0V DAC Code (VID4 = VID3 =VID2 = VID1 = 0, VID0 = 1), CGATE(H) = CGATE(L) = 3.3nF, COFF = 390pF; Unless otherwise stated.
+
-
+
-
+
-
VFB
COMP
COFF
OFF
TIME
PWM COMP
DISCHARGE
COMP
VOUT
VREF
VID0
VID1
VID2
VID3
VID4
DAC
BANDGAP
REFERENCE
+
-
1.10V
EA
CURRENT LIMIT
86mV
0.25V
FAULT
LATCH
R
S
Q
VCC
OVP
PWRGD
Gnd
GATE(L)
GATE(H)
VCC
UVLO
NONOVERLAP
LOGIC
-
-
+
-
Block Diagram


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