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CS5124 Datasheet(PDF) 4 Page - Cherry Semiconductor Corporation

Part No. CS5124
Description  High Performance, Integrated Current Mode PWM Controllers
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Maker  CHERRY [Cherry Semiconductor Corporation]
Homepage  http://www.cherrycorp.com/
Logo CHERRY - Cherry Semiconductor Corporation

CS5124 Datasheet(HTML) 4 Page - Cherry Semiconductor Corporation

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Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
4
Electrical Characteristics: -40°C ≤ TJ ≤ 125°C, -40°C ≤ TA ≤ 105°C, 7.60V ≤ VCC ≤ 20V, UVLO = 3.0V, ISENSE = 0V,
CV(CC) = 0.33µF, CGATE = 1nF (ESR = 10Ω), CSS = 470pF CV(FB) = 100pF, unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
8 Lead SO Narrow
CS5124
CS5126
11
VCC
VCC Power Input Pin.
2
-
BIAS
VCC Clamp Output Pin. This pin will control the gate of an N-channel MOS-
FET that in turn regulates VCC. This pin is internally clamped at 15V when
the IC is in sleep mode.
-
3
SYNC
Clock Synchronization Pin. A positive edge will terminate the current PWM
cycle. Ground this pin when it is not used.
3
2
UVLO
Sleep and under voltage lockout pin. A voltage greater than 1.8V causes the
chip to "wake up" however the GATE remains low. A voltage greater than
2.6V on this pin allows the output to switch.
4
4
SS
Soft Start Capacitor Pin. A capacitor placed between SS and GROUND is
charged with 10µA and discharged with 10mA. The Soft Start capacitor con-
trols both soft-start time and hiccup mode frequency.
55
VFB
Voltage Feedback Pin. The collector of an optocoupler is typically tied to this
pin. This pin is pulled up internally by a 4.3kΩ resistor to 5V and is clamped
internally at 2.9V(2.65V). If VFB is pulled > 4V, the oscillator is disabled and
GATE will stay high. If the VFB pin is pulled < 0.49V, GATE will stay low.
66
ISENSE
Current Sense Pin. This pin is connected to the current sense resistor on the
primary side. If VFB is floating, the GATE will go low if ISENSE = 195mV
(335mV). If ISENSE > 275mV (525mV), Soft Start will be initiated.
7
7
GATE
Gate Drive Output Pin. Capable of driving a 3nF load. GATE is nominally
clamped to 13.5V.
8
8
Gnd
Ground Pin.
s
Voltage Feedback
VFB Pull-up Res.
2.9
4.3
8.1
kΩ
VFB Clamp Voltage
CS5124 Only
2.63
2.90
3.15
V
VFB Clamp Voltage
CS5126 Only
2.40
2.65
2.90
V
VFB Fault Voltage Threshold
460
490
520
mV
s
Output Gate Drive
Maximum Sleep
VCC = 6.0V, IOUT = 1mA
1.2
2.0
V
Pull-down Voltage
GATE High (AC)
Series resistance < 1Ω (Note 1)
VCC-1
VCC-0.5
V
GATE Low (AC)
Series resistance < 1Ω (Note 1)
0.0
0.5
V
GATE High Clamp Voltage
VCC = 20V
11.0
13.5
16.0
V
Rise Time
Measure GATE rise time,
45
65
ns
1V < GATE < 9V; VCC =12V
Fall Time
Measure GATE fall time,
25
55
ns
9V > GATE > 1V; VCC = 12V
s
Thermal Shutdown
Thermal Shutdown Temperature (Note 1) (GATE low)
135
150
165
°C
Thermal Enable Temperature
(Note 1) (GATE switching)
100
125
150
°C
Thermal Hysteresis
(Note 1)
15
25
35
°C
Notes
1. Not tested in production. Specification is guaranteed by design.


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