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LPC662 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LPC662
Description  Low Power CMOS Dual Operational Amplifier
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LPC662 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J = 25˚C. Boldface limits apply at the temperature extremes. V
+ = 5V, V
= 0V, V
CM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
LPC662AM
LPC662AI
LPC662I
Parameter
Conditions
Typ
LPC662AMJ/883
Limit
Limit
Units
Limit
(Note 4)
(Note 4)
(Notes 4, 8)
Slew Rate
(Note 6)
0.11
0.07
0.07
0.05
V/µs
0.04
0.05
0.03
min
Gain-Bandwidth Product
0.35
MHz
Phase Margin
50
Deg
Gain Margin
17
dB
Amp-to-Amp Isolation
(Note 7)
130
dB
Input Referred Voltage Noise
F = 1 kHz
42
Input Referred Current Noise
F = 1 kHz
0.0002
Total Harmonic Distortion
F = 1 kHz, A
V = −10, V
+ = 15V
0.01
%
R
L = 100 kΩ,VO =8 VPP
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ±30 mA over long term may adversely affect reliability.
Note 2: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation of any ambient temperature is PD =(TJ(max)
−TA)/θJA.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4: Limits are guaranteed by testing or correlation.
Note 5: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V.
Note 6: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7: Input referred. V+ = 15V and RL = 100 kΩ connected to V
+/2. Each amp excited in turn with 1 kHz to produce V
O =13 VPP.
Note 8: A military RETS electrical test specification is available on request. At the time of printing, the LPC662AMJ/883 RETS specification complied fully with the
boldface limits in this column. The LPC662AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 9: For operating at elevated temperatures the device must be derated based on the thermal resistance
θJA with PD =(TJ −TA)/θJA.
Note 10: All numbers apply for packages soldered directly into a PC board.
Note 11: Do not connect output to V+when V+ is greater than 13V or reliability may be adversely affected.
www.national.com
4


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