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THS4509RGTT Datasheet(PDF) 31 Page - National Semiconductor (TI) |
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THS4509RGTT Datasheet(HTML) 31 Page - National Semiconductor (TI) |
31 / 42 page 0.144 0.0195 0.144 0.010 vias Pin 1 Top View 0.012 0.030 0.0705 0.015 0.0095 0.049 0.032 0.0245 THS4509 www.ti.com SLOS454H – JANUARY 2005 – REVISED NOVEMBER 2009 PowerPAD PCB LAYOUT useful for slowing the heat transfer during CONSIDERATIONS soldering operations. This resistance makes the soldering of vias that have plane connections Although there are many ways to properly heatsink easier. In this application, however, low thermal the PowerPAD package, the following steps illustrate resistance is desired for the most efficient heat the recommended approach. transfer. Therefore, the holes under the IC PowerPAD package should make the connection to the internal ground plane, with a complete connection around the entire circumference of the plated-through hole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This configuration prevents solder from being pulled away from the thermal pad area during the reflow process. 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals. 8. With these preparatory steps in place, the IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This process results in a part that is properly installed. The next consideration is the package constraints. Figure 93. PowerPAD PCB Etch and Via Pattern The two sources of heat within an amplifier are quiescent power and output power. The designer 1. Prepare the PCB with a top side etch pattern as should never forget about the quiescent heat shown in Figure 93. There should be etch for the generated within the device, especially multi-amplifier leads as well as etch for the thermal pad. devices. Because these devices have linear output 2. Place five holes in the area of the thermal pad. stages (Class AB), most of the heat dissipation is at The holes should be 13 mils (0.013 in, 0,33 mm) low output voltages with high output currents. in diameter. Keep them small so that solder The other key factor when dealing with power wicking through the holes is not a problem during dissipation is how the devices are mounted on the reflow. PCB. The PowerPAD devices are extremely useful 3. Additional vias may be placed anywhere along for heat dissipation. But the device should always be the thermal plane outside of the thermal pad soldered to a copper plane to fully use the heat area. They help dissipate the heat generated by dissipation properties of the PowerPAD. The SOIC the IC. These additional vias may be larger than package, on the other hand, is highly dependent on the 13-mil diameter vias directly under the how it is mounted on the PCB. As more trace and thermal pad. They can be larger because they copper area is placed around the device, θJA are not in the thermal pad area to be soldered, so decreases and the heat dissipation capability that wicking is not a problem. increases. For a single package, the sum of the RMS 4. Connect all holes to the internal ground plane. output currents and voltages should be used to choose the proper package. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is Copyright © 2005–2009, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Link(s): THS4509 |
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