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THS4131IDGNR Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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THS4131IDGNR Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 37 page THS4130 THS4131 SLOS318H – MAY 2000 – REVISED MAY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OPTIONS(1) PACKAGED DEVICES MSOP PowerPAD ™ MSOP SMALL OUTLINE EVALUATION TA (D) (DGN) SYMBOL (DGK) SYMBOL MODULES THS4130CD THS4130CDGN AOB THS4130CDGK ATP THS4130EVM 0 °C to +70°C THS4131CD THS4131CDGN AOD THS4131CDGK ATQ THS4131EVM THS4130ID THS4130IDGN AOC THS4130IDGK ASO — –40°C to +85°C THS4131ID THS4131IDGN AOE THS4131IDGK ASP — (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range,unless otherwise noted. UNIT VCC– to VCC+ Supply voltage ±33 V VI Input voltage ±VCC IO (2) Output current 150 mA VID Differential input voltage ±6 V Continuous total power dissipation See Dissipation Rating table TJ (3) Maximum junction temperature +150 °C TJ (4) Maximum junction temperature, continuous operation, long-term reliability +125 °C TA Operating free-air temperature C-suffix 0 °C to +70°C I-suffix –40°C to +85°C TSTG Storage temperature –65°C to +150°C ESD ratings: HBM 2500 V CDM 1500 V MM 200 V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The THS413x may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be connected to a thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI technical briefs SLMA002 and SLMA004 for more information about using the PowerPAD thermally-enhanced package. (3) The absolute maximum temperature under any condition is limited by the constraints of the silicon process. (4) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. DISSIPATION RATING TABLE POWER RATING(2) PACKAGE θJA (1) (°C/W) θJC (°C/W) TA= +25°C TA = +85°C D 97.5 38.3 1.02 W 410 mW DGN 58.4 4.7 1.71 W 685 mW DGK 134 72 750 mW 300 mW (1) This data was taken using the JEDEC standard High-K test PCB. (2) Power rating is determined with a junction temperature of +125 °C. This is the point where distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or below +125 °C for best performance and long-term reliability. 2 Copyright © 2000–2011, Texas Instruments Incorporated |
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