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LMH6601QMGXNOPB Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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LMH6601QMGXNOPB Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 37 page  LMH6601, LMH6601-Q1 www.ti.com SNOSAK9E – JUNE 2006 – REVISED MARCH 2013 5V ELECTRICAL CHARACTERISTICS Single Supply with VS= 5V, AV = +2, RF = 604Ω, SD tied to V +, V OUT = VS/2, RL = 150Ω to V − unless otherwise specified. Boldface limits apply at temperature extremes. (1) Symbol Parameter Condition Min (2) Typ (2) Max (2) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal VOUT = 0.25 VPP 130 MHz SSBW_1 VOUT = 0.25 VPP, AV = +1 250 Peak Peaking VOUT = 0.25 VPP, AV = +1 2.5 dB Peak_1 Peaking VOUT = 0.25 VPP 0 dB LSBW –3 dB Bandwidth Large Signal VOUT = 2 VPP 81 MHz Peak_2 Peaking VOUT = 2 VPP 0 dB 0.1 dB BW 0.1 dB Bandwidth VOUT = 2 VPP 30 MHz GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 155 MHz GBWP_150 Unity Gain, RL = 150Ω to VS/2 125 AVOL Large Signal Open Loop Gain 0.5V < VOUT < 4.5V 56 66 dB PBW Full Power BW –1 dB, AV = +4, VOUT = 4.2 VPP, 30 MHz RL = 150Ω to VS/2 DG Differential Gain 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V, 0.06 % RL = 150Ω to V − DP Differential Phase 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V 0.10 deg RL = 150Ω to V − Time Domain Response TRS/TRL Rise & Fall Time 0.25V Step 2.6 ns OS Overshoot 0.25V Step 10 % SR Slew Rate 2V Step 275 V/ μs TS Settling Time 1V Step, ±0.1% 50 ns TS_1 1V Step, ±0.02% 220 PD Propagation Delay Input to Output, 250 mV Step, 50% 2.4 ns CL Cap Load Tolerance AV = −1, 10% Overshoot, 75Ω in Series 50 pF Distortion & Noise Performance HD2 Harmonic Distortion (2nd) 2 VPP, 10 MHz −56 dBc HD2_1 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −61 HD3 Harmonic Distortion (3rd) 2 VPP, 10 MHz −73 dBc HD3_1 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −64 THD Total Harmonic Distortion 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −58 VN1 Input Voltage Noise >10 MHz 7 nV/ √Hz VN2 1 MHz 10 IN Input Current Noise >1 MHz 50 fA/ √Hz Static, DC Performance VIO Input Offset Voltage ±1 ±2.4 mV ±5.0 DVIO Input Offset Voltage Average Drift (3) −5 μV/°C IB Input Bias Current (4) 5 50 pA IOS Input Offset Current (4) 2 25 pA (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. (3) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. (4) This parameter is ensured by design and/or characterization and is not tested in production. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMH6601 LMH6601-Q1 |
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