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SLN02G72F1BK1MT-DCRT Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers

Part # SLN02G72F1BK1MT-DCRT
Description  2048MB DDR3L ??SDRAM ECC SO-UDIMM
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SLN02G72F1BK1MT-DCRT Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers

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Data Sheet
Rev.1.0
24.05.2013
Swissbit AG
Industriestrasse 4
Fon: +41 (0) 71 913 03 03
www.swissbit.com
Page 10
CH
– 9552 Bronschhofen
Fax: +41 (0) 71 913 03 15
eMail: info@swissbit.com
of 17
DDR3 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED
AC OPERATING CONDITIONS (Continued)
(0°C ≤ TCASE ≤ + 85°C; VDDQ, VDD = +1.283V – 1.45V)
AC CHARACTERISTICS
12800-CL11
10600-CL9
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
Unit
CTRL, CMD, Addr hold to CK,
CK#
tIH(Base)
120
-
140
-
ps
CTRL, CMD, Addr hold to CK,
CK#
VREF @ 1V/ns
tIH(1V)
220
-
240
-
ps
CAS# to CAS# command delay
tCCD
4
-
4
-
tCK
ACTIVE to ACTIVE (same bank)
command period
tRC
48.75
-
49.5
-
ns
ACTIVE to ACTIVE minimum
command period
tRRD
max
4nCK,6ns
max
4nCK,6ns
ns
ACTIVE to READ or WRITE
delay
tRCD
13.75
-
13.5
-
ns
Four bank
Activate period
1K Page size
tFAW
30
-
30
-
ns
2K Page size
40
-
45
-
ACTIVE to PRECHARGE
command
tRAS
35
70
’200
36
70
’200
ns
Internal READ to precharge
command delay
tRTP
max
4nCK,7.5ns
-
max
4nCK,7.5ns
-
ns
Write recovery time
tWR
15
-
15
-
ns
Auto precharge write recovery +
precharge time
tDAL
tWR + tRP/tCK
-
tWR + tRP/tCK
-
ns
Internal WRITE to READ
command delay
tWTR
max
4nCK,7.5ns
-
max
4nCK,7.5ns
-
ns
PRECHARGE command period
tRP
13.75
-
13.5
-
ns
LOAD MODE command cycle
time
tMRD
4
-
4
-
tCK
REFRESH to ACTIVE or
REFRESH to REFRESH
command interval
tRFC
160
70
’200
160
70
’200
ns
Average periodic refresh interval
0 °C
≤ TCASE ≤ 85°C
tREFI
-
7.8
-
7.8
µs
85 °C < TCASE
≤ 95°C
tREFI (IT)
-
3.9
-
3.9
RTT turn-on from ODTL on
reference
tAON
-225
225
-250
250
ps
RTT turn-on from ODTL off
reference
tAOF
0.3
0.7
0.3
0.7
tCK
Asynchronous RTT turn-on
delay (power Down with DLL off)
tAONPD
2
8,5
2
8,5
ns
Asynchronous RTT turn-off
delay (power Down with DLL off)
tAOFPD
2
8,5
2
8,5
ns
RTT dynamic change skew
tADC
0.3
0.7
0.3
0.7
tCK
Exit self refresh to commands
not requiring a locked DLL
tXS
max
5nCK,tR
FC + 10ns
-
max
5nCK,tR
FC + 10ns
-
ns
Write levelling setup from rising
CK, CK# crossing to rising DQS,
DQS# crossing
tWLS
165
-
195
-
ps
Write levelling setup from rising
DQS, DQS# crossing to rising
CK, CK# crossing
tWLH
165
-
195
-
ps
First DQS, DQS# rising edge
tWLMRD
40
-
40
-
tCK
DQS, DQS# delay
tWLDQSEN
25
-
25
-
tCK


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