preliminary

Data Sheet

Rev.0.9

22.07.2013

Swissbit AG

Industriestrasse 4

Fon: +41 (0) 71 913 03 03

www.swissbit.com

Page 8

CH-9552 Bronschhofen

Fax: +41 (0) 71 913 03 15

eMail: info@swissbit.com

of 16

Parameter

& Test Condition

max.

Symbol 12800-CL11

10600-CL9

8700-CL7

Unit

OPERATING WRITE CURRENT:

All device banks open, Continuous burst writes; One

CKE is HIGH, CS# is HIGH between valid commands;

Address bus inputs are changing once every two clock

cycles; DQ inputs changing once per clock cycle

1000

880

760

mA

BURST REFRESH CURRENT:

interval, CKE is HIGH, CS# is HIGH between valid

commands; All other Control and Address bus inputs

are changing once every two clock cycles; DQ inputs

changing once per clock cycle

1240

1184

1152

mA

SELF REFRESH CURRENT:

160

160

160

mA

OPERATING CURRENT*) :

Four device bank interleaving READs,

CKE is HIGH, CS# is HIGH between valid commands;

Address bus inputs are not changing during

DESELECT; DQ inputs changing once per clock cycle

1760

1520

1280

mA

*) Value calculated as one module rank in this operating condition, and all other module ranks in IDD2P (CKE LOW)

mode.

SYMBOL

12800-CL11

10600-CL9

8700-CL7

Unit

11

9

7

13.75

13.5

13.125

ns

48.75

49.5

50.625

ns

6

6

7.5

ns

1.25

1.5

1.875

ns

35

36

37.5

ns

70’200

70’200

70’200

ns

13.75

13.5

13.1

ns

260

260

260

ns