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S80L186EB16 Datasheet(PDF) 56 Page - InnovASIC, Inc

Part # S80L186EB16
Description  8-Bit/16-Bit Microcontrollers
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Manufacturer  INNOVASIC [InnovASIC, Inc]
Direct Link  http://www.innovasic.com
Logo INNOVASIC - InnovASIC, Inc

S80L186EB16 Datasheet(HTML) 56 Page - InnovASIC, Inc

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IA186EB/IA188EB
Data Sheet
8-Bit/16-Bit Microcontrollers
July 10, 2011
IA211080314-13
http://www.Innovasic.com
UNCONTROLLED WHEN PRINTED OR COPIED
Customer Support:
Page 56 of 85
1-888-824-4184
5.2
Clock Input and Clock Output Timing Characteristics
For clock input and clock output timing characteristics for both 5.0- and 3.3-volt operation, see
Tables 18 and 19, respectively.
Figure 16. Clock Input and Clock Output Timing Characteristics
Table 18. Clock Input and Clock Output Timing Characteristics for 5.0-Volt Operation
Item
Symbol
Parameter
Min
Max
Units
Notes
XTF
clkin
Frequency
0
50
MHz
1
TCKIN
clkin Period
20
ns
2
TCHCK
clkin High
Time
10
ns
Measure for VIH for high time, NIL for
low time.
3
TCLCK
clkin Low
Time
10
ns
Measure for VIH for high time, NIL for
low time.
4
TCKLH
clkin Rise
Time
1
5
ns
Only required to guarantee ICC.
Maximum limits are bounded for TC,
TCH, and TCL.
5
TCKHL
clkin Fall
Time
1
5
ns
Only required to guarantee ICC.
Maximum limits are bounded for TC,
TCH, and TCL.
6
TCICO
clkin to clkout
Delay
0
11.5
ns
Specified for a 50-pF load.
7
TCLCL
clkout Period
2TCKIN
ns
8
TCHCL
clkout High
Time
(TCLCL/2)
– 5
(TCLCL/2)
+ 5
ns
Measure for VIH for high time, NIL for
low time.
9
TCCCH
clkout Low
Time
(TCLCL/2)
– 5
(TCLCL/2)
+ 5
ns
Measure for VIH for high time, NIL for
low time.
10
TCH1CH2
clkout Rise
Time
1
6
ns
Specified for a 50-pF load.
11
TCL2CL1
clkout Fall
Time
1
6
ns
Specified for a 50-pF load.


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