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S80L186EB16 Datasheet(PDF) 31 Page - InnovASIC, Inc

Part # S80L186EB16
Description  8-Bit/16-Bit Microcontrollers
Download  85 Pages
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Manufacturer  INNOVASIC [InnovASIC, Inc]
Direct Link  http://www.innovasic.com
Logo INNOVASIC - InnovASIC, Inc

S80L186EB16 Datasheet(HTML) 31 Page - InnovASIC, Inc

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IA186EB/IA188EB
Data Sheet
8-Bit/16-Bit Microcontrollers
July 10, 2011
IA211080314-13
http://www.Innovasic.com
UNCONTROLLED WHEN PRINTED OR COPIED
Customer Support:
Page 31 of 85
1-888-824-4184
Table 7. IA186EB Pin/Signal Descriptions (Continued)
Signal
Pin
Description
Name
PLCC
LQFP
PQFP
pdtmr
pdtmr
36
24
67
power-down timer. Input/Output (push-pull).
Note: The IA186EB enters Powerdown Mode
when the PWRDN bit in the Power Control
Register is set to 1 and a HALT instruction is
executed. Exit from the Powerdown Mode
occurs upon receipt of a non-maskable interrupt
(i.e., assertion of the nmi input) or a reset (i.e.,
assertion of the resin_n input).
The pdtmr pin, which is normally connected to
an external capacitor, determines the amount of
time that the IA186EB waits before resuming
normal operation after an exit from the
Powerdown when a non-maskable interrupt is
received
—essentially a delay between the
assertion of the nmi input and the enabling of
the IA186EB internal clocks. The delay
required depends on the start-up characteristics
of the crystal oscillator.
The pdtmr pin does not apply when the
Powerdown Mode is exited by the receipt of a
reset (i.e., the assertion resin_n).
pereq
pereq
39
NA
NA
numerics coprocessor external request. Input.
Active High. When asserted (high), this signal
indicates that a data transfer between an Intel
80C187 Numerics Coprocessor.and memory is
pending. This applies to the PLCC only.
rd_n
rd_n
4
73
36
read. Output. Active Low. When asserted
(low), rd_n indicates that the accessed memory
or I/O device must drive data from the location
being accessed onto the data bus.
ready
ready
18
6
49
ready. Input. Active High. When asserted
(high) the ready line indicates a bus-cycle
completion. This signal must be active to
terminate any bus cycle unless the IA186EB
Chip-Select Unit is configured to ignore ready.
resin_n
resin_n
37
25
68
reset input. Input. Active Low. When resin_n
is asserted (low), the IA186EB immediately
terminates any bus cycle in progress and
assumes an initialized state. All pins are driven
to a known state, and resout (see next table
entry) is asserted.


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