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L6747A Datasheet(PDF) 8 Page - STMicroelectronics |
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L6747A Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 15 page Device description and operation L6747A 8/15 Doc ID 17126 Rev 1 4 Device description and operation The L6747A provides high-current driving control for both high-side and low-side N-channel MOSFETs, connected as step-down DC-DC converters and driven by an external PWM signal. The integrated high-current drivers allow the use of different types of power MOSFETs (also multiple MOS to reduce the equivalent RDS(on)), maintaining fast switching transition. The driver for the high-side MOSFET uses the BOOT pin for supply and the PHASE pin for return. The driver for the low-side MOSFET uses the VCC pin for supply and the PGND pin for return. The driver includes anti-shoot-through and adaptive dead-time control to minimize low-side body diode conduction time, maintaining good efficiency and eliminating the need for Schottky diodes. When the high-side MOSFET turns off, the voltage on its source begins to fall; when the voltage falls below the proper threshold, the low-side MOSFET gate drive voltage is suddenly applied. When the low-side MOSFET turns off, the voltage at the LGATE pin is sensed. When it drops below the proper threshold, the high-side MOSFET gate drive voltage is suddenly applied. If the current flowing in the inductor is negative, the source of the high-side MOSFET never drops. To allow the low-side MOSFET to turn on even in this case, a watchdog controller is enabled. If the source of the high-side MOSFET does not drop, the low-side MOSFET is switched on, allowing the negative current of the inductor to recirculate. This mechanism allows the system to regulate even if the current is negative. Before VCC goes above the UVLO threshold, the L6747A keeps both the high-side and low- side MOSFETS firmly OFF. Then, after the UVLO has been crossed, the EN and PWM inputs take control over the driver’s operations. The EN pin enables the driver. If low, it keeps all MOSFETs OFF (HiZ) regardless of the status of PWM. When EN is high, the PWM input takes control. If externally set within the HiZ window, the driver enters an HiZ state and both MOSFETS are kept in an OFF state until PWM exits the HiZ window (see Figure 4). After the UVLO threshold has been crossed and while in HiZ, the preliminary OV protection is activated. If the voltage sensed through the PHASE pin goes above about 1.8 V, the low- side MOSFET is latched ON in order to protect the load from dangerous overvoltage. The driver status is reset from a PWM transition. Driver power supply, as well as power conversion input, are flexible: 5 V and 12 V can be chosen for high-side and low-side MOSFET voltage drive. Figure 4. Timing diagram (EN = high) thold-off HiZ Window PWM HS Gate LS Gate HiZ Window thold-off V PWM_IH V PWM_IL |
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