RENESAS TECHNICAL UPDATE TN-R8C-A041A/E

Date: April 2, 2014

Page 3 of 3

Corrections

• Page 92 of 791

Table 7.4 “Procedure for Setting Bits Associated with Voltage Monitor 2 Interrupt” is corrected as follows.

Step

When Digital Filter is Used

When Digital Filter is Not Used

1

Set the VCA23 bit in the VCA2 register to 0 (internal reference voltage).

Set the VCA27 bit in the VCA2 register to 1 (voltage detection 2 circuit enabled).

3

Wait for td (E-A).

4

Set the IRQ2SEL bit in the CMPA register to select the interrupt type.

5

Set bits VW2F0 and VW2F1 in the VW2C register to

select the sampling clock for the digital filter.

Set the VW2C1 bit in the VW2C register to 1 (digital

filter disabled).

Set the VW2C1 bit in the VW2C register to 0 (digital

filter enabled).

-

7

Set the VCAC2 bit in the VCAC register and the VW2C7 bit in the VW2C register to select the timing for an

interrupt request.

8

Set the VW2C bit in the VW2C2 register to 0.

9

Set the CM14 bit in the CM1 register to 0 (low-speed

on-chip oscillator on).

-

10

Wait for 2 cycles of the sampling clock of the digital

filter.

- (No wait time)

Set the VW2C0 bit in the VW2C register to 1 (voltage monitor 2 interrupt enabled).

Step

When Digital Filter is Used

When Digital Filter is Not Used

1

Set the VCA27 bit in the VCA2 register to 1 (voltage detection 2 circuit enabled).

2

Wait for td (E-A).

3

Set the IRQ2SEL bit in the CMPA register to select the interrupt type.

Set bits VW2F0 and VW2F1 in the VW2C register to

select the sampling clock for the digital filter.

Set the VW2C1 bit in the VW2C register to 1 (digital

filter disabled).

Set the VW2C1 bit in the VW2C register to 0 (digital

filter enabled).

-

Set the VW2C7 bit in the VW2C register to select the timing for interrupt detection.

7

Set the VCAC2 bit in the VCAC register to select the timing for interrupt detection.

8

Set the CM14 bit in the CM1 register to 0 (low-speed

on-chip oscillator on).

-

9

- (No wait time)

10

Set the VW2C2 bit in the VW2C register to 0.

Set the VW2C0 bit in the VW2C register to 1 (voltage monitor 2 interrupt enabled).

Before

(the latest User’s Manual, Rev.2.00)

Notes:

1. When the VW2C0 bit is 0, steps 1 and 2 can be performed at the same time (with one instruction).

2. When the VW2C0 bit is 0, steps 5 and 6 can be performed at the same time (with one instruction).

3. When this setting is made with the voltage monitor 2 interrupt disabled (the VW2C0 bit is 0, the VCA27 bit is 0),

if VCC

<Vdet2 (or VCC＞Vdet2) is detected, no interrupt is generated until the voltage monitor 2 interrupt in step 11 is enabled. If VCC<Vdet2 (or VCC＞

Vdet2) is detected between steps 9 and 11, the VW2C2 bit is set to 1. Read the VW2C2 bit after step 11, and perform the processing required for

detection if the read value is 1.

After

Notes:

2. When this setting is made with the voltage monitor 2 interrupt disabled (the VW2C0 bit is 0, the VCA27 bit is 0),

if VCC

<Vdet2 (or VCC＞Vdet2) is detected, no interrupt is generated until the voltage monitor 2 interrupt in step 11 is enabled. If VCC<Vdet2 (or VCC＞

detection if the read value is 1.

Table 7.4 Procedure for Setting Bits Associated with Voltage Monitor 2 Interrupt