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RMLV0416E Datasheet(PDF) 9 Page - Renesas Technology Corp

Part No. RMLV0416E
Description  4Mb Advanced LPSRAM
Download  15 Pages
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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RMLV0416E Datasheet(HTML) 9 Page - Renesas Technology Corp

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RMLV0416E Series
R10DS0205EJ0100 Rev.1.00
Page 9 of 13
2014.2.27
Write Cycle (2) (WE# CLOCK, OE# Low Fixed)
Note 20. tWP is the minimum time to perform a write.
A write starts when all of (CS1#), (CS2), (WE#) and (one or both of LB# and UB#) become active.
A write is performed during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low UB#.
A write ends when any of (CS1#), (CS2), (WE#) or (one or both of LB# and UB#) becomes inactive.
21. tWHZ is defined as the time when the I/O pins enter a high-impedance state and are not referred to the I/O
levels.
22. This parameter is sampled and not 100% tested.
23. During this period, I/O pins are in the output state so input signals must not be applied to the I/O pins.
CS1#
A0~17
tCW
tWHZ
OE#
WE#
I/O0~15
tDH
tWC
LB#,UB#
tBW
CS2
tCW
Valid address
tWR
tAW
tAS
tWP
tDW
tOW
*20
*21,22
VIL
OE# = “L” level
Valid Data
*23
*23


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