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BDxxIC0MEFJ-LB

Datasheet

TSZ02201-0R6R0AZ00590-1-2

© 2013 ROHM Co., Ltd. All rights reserved.

www.rohm.com

TSZ22111･15･001

21.Feb.2014 Rev.002

Power Dissipation

◎HTSOP-J8

Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed

temperature limits, and thermal design should allow sufficient margin from the limits.

1. Ambient temperature Ta can be no higher than 105℃.

2. Chip junction temperature (Tj) can be no higher than 150℃.

Chip junction temperature can be determined as follows:

Most of the heat loss that occurs in the BDxxIC0MEFJ-LB is generated from the output Pch FET. Power loss is determined

heat dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in

the BDxxIC0MEFJ-LB make certain to factor conditions such as substrate size into the thermal design.

Power consumption[W] =

Power consumption[W] =

5.0V - 3.3V

×0.1A

=0.17W

Calculation based on ambient temperature (Ta)

Tj=Ta+θj-a×W

＜Reference values＞

1-layer substrate (copper foil density 0mm×0mm)

2-layer substrate (copper foil density 15mm×15mm)

2-layer substrate (copper foil density 70mm×70mm)

4-layer substrate (copper foil density 70mm×70mm)

Substrate size: 70mm×70mm×1.6mm (substrate with thermal via)

θj-a: HTSOP-J8 153.2℃/W

113.6℃/W

59.2℃/W

33.3℃/W

Measure condition: mounted on a ROHM board,

and IC

Substrate size: 70mm × 70mm × 1.6mm

(Substrate with thermal via)

・ Solder the substrate and package reverse

exposure heat radiation part

① IC only

θj-a=249.5℃/W

② 1-layer（copper foil are :0mm×0mm）

θj-a=153.2℃/W

③ 2-layer（copper foil are :15mm×15mm）

θj-a=113.6℃/W

④ 2-layer（copper foil are :70mm×70mm）

θj-a=59.2℃/W

⑤ 4-layer（copper foil are :70mm×70mm）

θj-a=33.3℃/W

0

25

50

75

100

125

150

0

2.0

3.0

4.0

①0.50W

周囲温度:Ta [℃]

1.0

①0.50W

②0.82W

③1.10W

④2.11W

⑤3.76W

Ambient Temperature :Ta [℃]