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CAT25C256U14A-TE13 Datasheet(PDF) 6 Page - Catalyst Semiconductor |
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CAT25C256U14A-TE13 Datasheet(HTML) 6 Page - Catalyst Semiconductor |
6 / 11 page 6 CAT25C128/256 Doc. No. 25088-00 1/01 Status Register Bits Array Address Protection BP1 BPO Protected 25C128 25C256 0 0 None None No Protection 0 1 3000-3FFF 6000-7FFF Quarter Array Protection 1 0 2000-3FFF 4000-7FFF Half Array Protection 1 1 0000-3FFF 0000-7FFF Full Array Protection BLOCK PROTECTION BITS Protected Unprotected Status WPEN WP WP WP WP WP WEL Blocks Blocks Register 0 X 0 Protected Protected Protected 0 X 1 Protected Writable Writable 1 Low 0 Protected Protected Protected 1 Low 1 Protected Writable Protected X High 0 Protected Protected Protected X High 1 Protected Writable Writable WRITE PROTECT ENABLE OPERATION 76543210 WPEN X X X BP1 BP0 WEL RDY STATUS REGISTER STATUS REGISTER The Status Register indicates the status of the device. The RDY (Ready) bit indicates whether the CAT25C128/ 256 is busy with a write operation. When set to 1 a write cycle is in progress and when set to 0 the device indicates it is ready. This bit is read only The WEL (Write Enable) bit indicates the status of the write enable latch . When set to 1, the device is in a Write Enable state and when set to 0 the device is in a Write Disable state. The WEL bit can only be set by the WREN instruction and can be reset by the WRDI instruction. The BPO and BP1 (Block Protect) bits indicate which blocks are currently protected. These bits are set by the user issuing the WRSR instruction. The user is allowed to protect quarter of the memory, half of the memory or the entire memory by setting these bits. Once protected the user may only read from the protected portion of the array. These bits are non-volatile. The WPEN (Write Protect Enable) is an enable bit for the WP pin. The WP pin and WPEN bit in the status register control the programmable hardware write protect fea- ture. Hardware write protection is enabled when WP is low and WPEN bit is set to high. The user cannot write to the status register (including the block protect bits and the WPEN bit) and the block protected sections in the memory array when the chip is hardware write pro- tected. Only the sections of the memory array that are not block protected can be written. Hardware write protection is disabled when either WP pin is high or the WPEN bit is zero. |
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