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CAT28F020TA-70T Datasheet(PDF) 5 Page - Catalyst Semiconductor

Part # CAT28F020TA-70T
Description  2 Megabit CMOS Flash Memory
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Manufacturer  CATALYST [Catalyst Semiconductor]
Direct Link  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT28F020TA-70T Datasheet(HTML) 5 Page - Catalyst Semiconductor

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CAT28F020
5
Doc. No. 25037-00 2/98 F-1
SUPPLY CHARACTERISTICS
Limits
Symbol
Parameter
Min
Max.
Unit
VCC
VCC Supply Voltage
4.5
5.5
V
VPPL
VPP During Read Operations
0
6.5
V
VPPH
VPP During Read/Erase/Program
11.4
12.6
V
Figure 1. A.C. Testing Input/Output Waveform(3)(4)(5)
Testing Load Circuit (example)
A.C. CHARACTERISTICS, Read Operation
VCC = +5V ±10%, unless otherwise specified.
JEDEC
Standard
Symbol
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
tAVAV
tRC
Read Cycle Time
120
ns
tELQV
tCE
CE Access Time
120
ns
tAVQV
tACC
Address Access Time
120
ns
tGLQV
tOE
OE Access Time
50
ns
tAXQX
tOH
Output Hold from Address
OE/CE Change
0
ns
tGLQX
tOLZ(1)(6)
OE to Output in Low-Z
0
ns
tELQX
tLZ(1)(6)
CE to Output in Low-Z
0
ns
tGHQZ
tDF(1)(2)
OE High to Output High-Z
30
ns
tEHQZ
tDF(1)(2)
CE High to Output High-Z
40
40
ns
tWHGL(1)
-
Write Recovery Time Before Read
6
µs
28F020-90(7)
Max.
Min.
70
70
28
70
0
0
0
20
30
6
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
CL = 100 pF
OUT
CL INCLUDES JIG CAPACITANCE
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
CL = 30 pF
OUT
CL INCLUDES JIG CAPACITANCE
INPUT PULSE LEVELS
REFERENCE POINTS
2.0 V
0.8 V
2.4 V
0.45 V
INPUT PULSE LEVELS
REFERENCE POINTS
1.5 V
3.0 V
0.0 V
Testing Load Circuit (example)
Figure 2. Highspeed A.C. Testing Input/Output
Waveform(3)(4)(5)
Note:
(1)
This parameter is tested initially and after a design or process change that affects the parameter.
(2)
Output floating (High-Z) is defined as the state where the external data line is no longer driven by the output buffer.
(3)
Input Rise and Fall Times (10% to 90%) < 10 ns.
(4)
Input Pulse Levels = 0.45V and 2.4V. For High Speed Input Pulse Levels 0.0V and 3.0V.
(5)
Input and Output Timing Reference = 0.8V and 2.0V. For High Speed Input and Output Timing Reference = 1.5V.
(6)
Low-Z is defined as the state where the external data may be driven by the output buffer but may not be valid.
(7)
For load and reference points, see Fig. 1
(8)
For load and reference points, see Fig. 2
28F020-70(8)
90
90
35
90
0
0
0
30
6
28F020-12(7)


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