DRV411

SBOS693B – AUGUST 2013 – REVISED DECEMBER 2013

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

(1)

For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or visit

the device product folder at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

Over operating free-air temperature range (unless otherwise noted).

VALUE

MIN

MAX

UNIT

Supply voltage (VDD to GND)

+7

V

GND – 0.5

VDD + 0.5

V

Differential amplifier inputs

GND – 6

VDD + 6

V

–25

+25

mA

300

mA

–50

+150

°C

–65

+150

°C

Human body model (HBM)

–2000

+2000

V

JEDEC standard 22, test method A114-C.01

Electrostatic

Charged device model (CDM)

discharge (ESD)

–1000

+1000

V

JEDEC standard 22, test method C101

ratings

Machine model (MM)

–150

+150

V

JEDEC standard 22, test method A115

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-

maximum rated conditions for extended periods may affect device reliability.

(2)

Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must

be current limited, except for the differential amplifier input pins.

(3)

These inputs are not internally protected against overvoltage. The differential amplifier input pins must be limited to 5 mA (max) or ±1.5

V (max).

(4)

Power-limited; observe maximum junction temperature.

THERMAL INFORMATION

DRV411

PWP (TSSOP)

RGP (QFN)

UNITS

20 PINS

20 PINS

Junction-to-ambient thermal resistance

37.2

33.8

Junction-to-case (top) thermal resistance

24.3

34.6

Junction-to-board thermal resistance

19.8

11.1

°C/W

Junction-to-top characterization parameter

0.7

0.4

Junction-to-board characterization parameter

19.6

11.2

Junction-to-case (bottom) thermal resistance

2.0

2.4

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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