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D5001R803R3PACEM Datasheet(PDF) 2 Page - International Rectifier |
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D5001R803R3PACEM Datasheet(HTML) 2 Page - International Rectifier |
2 / 10 page 2 www.irf.com (26 TO 55V Input, Regulated Dual Outputs) (+1.8V and +3.3V) D5001R803R3P Circuit Description Design Methodology An under-voltage protection circuit prohibits the converter from operating when the line voltage is too low for safe operation. The converter will not start until the line voltage rises to approximately 20V. An inhibit pin is provided to control converter operation. This inhibit pin is intended for operation with an open collector transistor drive or a relay closure to the input return. The pin may be left open for normal operation and has a nominal open circuit voltage of 4.0V. Also provided are the individual output on/off control pins (Pin 10, Output 1 Inhibit and Pin 9, Output 2 Inhibit). The D-Series is developed using a proven conservative design methodology, which includes selecting radiation tolerant and established reliability components and fully derating to the requirements of EEE-INST-002. Heavy derating of the radiation- hardened power MOSFET virtually eliminates the possibility of SEGR and SEB. Synchronization input pin is included allowing multiple converters to operate at a common switching frequency. Converters can be synchronized to a common frequency with an external clock. This may be used to eliminate beat frequency noise or to avoid generating noise at certain frequencies for noise sensitive systems. The D-Series DC-DC converters utilize two-stage regulation with a flyback topology with a switching frequency of 250KHz for primary regulation and linear post regulation in the secondary for each of the outputs. Output power is limited under any load fault condition to approximately 110% of rated output. An overload condition causes the converter output to behave like a constant current source with the output voltage dropping below nominal. The converter will resume normal operation when the load current is reduced below the current limit point. This protects the converter from both overload and short circuit conditions. There are no latching elements to eliminate the possibility of falsely triggering the protection circuits during single event radiation exposure. |
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