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CWB308 Datasheet(PDF) 1 Page - Calogic, LLC

Part No. CWB308
Description  CMOS/DMOS Quad Monolithic SPST Wide Band Analog Switches
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Maker  CALOGIC [Calogic, LLC]
Homepage  http://www.calogic.net
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CWB308 Datasheet(HTML) 1 Page - Calogic, LLC

   
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CMOS/DMOS
Quad Monolithic SPST
Wide Band Analog Switches
CWB308 / CWB309
FEATURES
•• Low Insertion Loss . . . . . . . . . . . . . 0.9 x DC @ 100MHz
•• Low Channel-to-Channel Crosstalk. . . . . . . . . . . . -80dB
•• High OFF Isolation . . . . . . . . . . . . . . . . . 68dB @ 10MHz
•• Fast Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . <140ns
•• Low ON Resistance. . . . . . . . . . . . . . . . . . . . . . 40Ω (typ)
APPLICATIONS
•• High Speed Multiplexing
•• RF & Video Switches
•• Sample and Hold Switches
•• Track and Hold Switches
•• Computer Peripherals
DESCRIPTION
The Calogic CWB308 and CWB309 feature fast switching
(<140ns) and low ON resistance (<40
Ω) for excellent
performance in applications in communications, computer
peripherals and instrument controls. This series combines
low power CMOS input logic and level translation circuitry with
high speed, low capacitance DMOS switches in a monolithic
structure.
The CWB308 and CWB309 have CMOS
compatible inputs and also have a standard pin configuration
for second sourcing.
ORDERING INFORMATION
Part
Package
Temperature Range
CWB308CP
Plastic 16-Pin Dip
0 to +85
oC
CWB308CY
Plastic SO-16 Surface Mount 0 to +85
oC
XCWB308
Sorted Chips in Carriers
0 to +85
oC
CWB309CP
Plastic 16-Pin Dip
0 to +85
oC
CWB309CY
Plastic SO-16 Surface Mount 0 to +85
oC
XCWB309
Sorted Chips in Carriers
0 to +85
oC
CORPORATION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
V-
GND
S4
D4
IN4
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
V-
GND
S4
D4
IN4
IN2
D2
S2
V+
N/C
S3
D3
IN3
IN2
D2
S2
V+
N/C
S3
D3
IN3
TOP VIEW
TOP VIEW
16-PIN DIP
SO-16
CWB308CY
CWB309CY
CWB308CP
CWB309CP
Logic
CWB308
CWB309
0
OFF
ON
1
ON
OFF
All devices contain diodes to protect inputs against damage due
to high static voltages or electric fields; however, it is advised that
precautions be taken not to exceed the maximum recommended
input voltages.
All unused inputs must be connected to an
appropriate logic level (either Vcc or GND).
LOGIC TABLE
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAMS
IN
IN
IN
IN
S
D
3
4
1
2
S
D
S
D
S
D
1
1
2
2
3
3
4
4
IN
IN
IN
IN
S
D
3
4
1
2
S
D
S
D
S
D
1
1
2
2
3
3
4
4
Four SPST Switches per Package.
Switches shown in Logic '1' Input Position.
CWB308
CWB309
CWB


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