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SN74LS373N Datasheet(PDF) 3 Page - Motorola, Inc

Part No. SN74LS373N
Description  OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

SN74LS373N Datasheet(HTML) 3 Page - Motorola, Inc

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5-523
FAST AND LS TTL DATA
SN54/74LS373
• SN54/74LS374
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
Input Clamp Diode Voltage
– 0.65
– 1.5
V
VCC = MIN, IIN = – 18 mA
VOH
Output HIGH Voltage
54
2.4
3.4
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
74
2.4
3.1
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
54, 74
0.25
0.4
V
IOL = 12 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
74
0.35
0.5
V
IOL = 24 mA
VIN = VIL or VIH
per Truth Table
IOZH
Output Off Current HIGH
20
µA
VCC = MAX, VOUT = 2.7 V
IOZL
Output Off Current LOW
– 20
µA
VCC = MAX, VOUT = 0.4 V
IIH
Input HIGH Current
20
µA
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
0.1
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
– 0.4
mA
VCC = MAX, VIN = 0.4 V
IOS
Short Circuit Current (Note 1)
– 30
– 130
mA
VCC = MAX
ICC
Power Supply Current
40
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
LS373
LS374
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
fMAX
Maximum Clock Frequency
35
50
MHz
CL = 45 pF,
RL = 667 Ω
tPLH
tPHL
Propagation Delay,
Data to Output
12
12
18
18
ns
CL = 45 pF,
RL = 667 Ω
tPLH
tPHL
Clock or Enable
to Output
20
18
30
30
15
19
28
28
ns
CL = 45 pF,
RL = 667 Ω
tPZH
tPZL
Output Enable Time
15
25
28
36
20
21
28
28
ns
tPHZ
tPLZ
Output Disable Time
12
15
20
25
12
15
20
25
ns
CL = 5.0 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Symbol
Parameter
LS373
LS374
Unit
Symbol
Parameter
Min
Max
Min
Max
Unit
tW
Clock Pulse Width
15
15
ns
ts
Setup Time
5.0
20
ns
th
Hold Time
20
0
ns
DEFINITION OF TERMS
SETUP TIME (ts) — is defined as the minimum time required
for the correct logic level to be present at the logic input prior to
LE transition from HIGH-to-LOW in order to be recognized and
transferred to the outputs.
HOLD TIME (th) — is defined as the minimum time following
the LE transition from HIGH-to-LOW that the logic level must
be maintained at the input in order to ensure continued
recognition.


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