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L6743D Datasheet(PDF) 11 Page - STMicroelectronics

Part # L6743D
Description  High current MOSFET driver
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6743D Datasheet(HTML) 11 Page - STMicroelectronics

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L6743D
Device description and operation
11/16
Referring to Figure 6, classical MOSFET driver can be represented by a push-pull output
stage with two different MOSFETs: P-MOSFET to drive the external gate high and N-
MOSFET to drive the external gate low (with their own RdsON: Rhi_HS, Rlo_HS, Rhi_LS,
Rlo_LS). The external power MOSFET can be represented in this case as a capacitance
(CG_HS, CG_LS) that stores the gate-charge (QG_HS, QG_LS) required by the external power
MOSFET to reach the driving voltage (PVCC for HS and VCC for LS). This capacitance is
charged and discharged at the driver switching frequency FSW.
The total power Psw is dissipated among the resistive components distributed along the
driving path. According to the external Gate resistance and the power-MOSFET intrinsic
gate resistance, the driver dissipates only a portion of Psw as follow:
The total power dissipated from the driver can then be determined as follow:
Figure 6.
Equivalent circuit for MOSFET drive
4.5
Layout guidelines
L6743D provides driving capability to implement high-current step-down DC-DC converters.
The first priority when placing components for these applications has to be reserved to the
power section, minimizing the length of each connection and loop as much as possible. To
minimize noise and voltage spikes (also EMI and losses) power connections must be a part
of a power plane and anyway realized by wide and thick copper traces: loop must be anyway
minimized. The critical components, such as the power MOSFETs, must be close one to the
other. However, some space between the power MOSFET is still required to assure good
thermal cooling and airflow.
Traces between the driver and the MOSFETS should be short and wide to minimize the
inductance of the trace so minimizing ringing in the driving signals. Moreover, VIAs count
needs to be minimized to reduce the related parasitic effect.
P
SW
HS
1
2
--- C
GHS
PVCC
2
Fsw
R
hiHS
R
hiHS
R
GateHS
R
iHS
++
----------------------------------------------------------------
R
loHS
R
loHS
R
GateHS
R
iHS
++
----------------------------------------------------------------
+
⎝⎠
⎛⎞
⋅⋅
=
P
SW
LS
1
2
--- C
GLS
VCC
2
Fsw
R
hiLS
R
hiLS
R
GateLS
R
iLS
++
--------------------------------------------------------------
R
loLS
R
loLS
R
GateLS
R
iLS
++
--------------------------------------------------------------
+
⎝⎠
⎛⎞
⋅⋅
=
PP
DC
P
SW
HS
P
SW
LS
++
=
RGATELS
RILS
CGLS
VCC
LS DRIVER
LS MOSFET
GND
LGATE
RGATEHS
RIHS
CGHS
BOOT
HS DRIVER
HS MOSFET
PHASE
HGATE
VCC


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