11

®

PCM1710U

FUNCTION MODE SELECTION

B0

B1

B2

BIT NO.

FLAG

MODE

BIT VALUE

SELECTED FUNCTION

DEFAULT

B3

DEEM2

B4

DEEM1

Sampling Frequency

for De-emphasis

Mode

H

L

L

B5

IIR

De-emphasis

0

De-emphasis OFF

1

1

De-emphasis ON

B6

MUTE

Mute

0

Mute OFF

1

Mute ON

B7

DSD

Double-Speed

0

Double-speed OFF

1

Double-speed ON

B3

Not Assigned

B4

TST

Test Mode

0

Infinite Zero Detection OFF

1

Infinite Zero Detection ON

Mode

H

L

H

B5

IW

Input Resolution

0

16-Bit

2

1

20-Bit

B6

LRPL

Polarity for LRCI

0

Lch:high/Rch:low

Lch:high

1

Lch:low/Rch:high

Rch:low

B7

IIS

Input Format

0

Normal

1

IIS

DEEM2

01

DEEM1

0

48kHz

1

32kHz

44.1kHz

FIGURE 6. Mode Control Input Format, Serial Mode.

DIGITAL DE-EMPHASIS

PCM1710 allows three different sampling rates for digital

de-emphasis. B3 and B4 are used for binary control of the

de-emphasis frequency:

B3

B4

Frequency

0

0

OFF

0

1

48kHz

1

0

32kHz

1

1

44.1kHz

MODE 1 CONTROLS

This mode can be enabled with the sequence of 1, 0, 0 as the

first three bits on MD (pin 26). This mode allows for the

following functions:

De-emphasis

On/Off

De-emphasis Frequency

32kHz, 44.1kHz, 48kHz

Soft Mute

On/Off

Double-Speed Dubbing

On/Off

DIGITAL ATTENUATION

One of the functions which can be implemented through use

of the serial mode control is attenuation. This function

allows the user to control the level of the output, indepen-

dent of the of the input level set by the actual input data

supplied to the DAC.

Referring to Figure 6, when the first data bit (B0) on MD

(pin 26) is low, the attenuation function is enabled. The next

seven bits (B1 - B6) define a binary value, ATT_DATA, that

indicates the desired level of attenuation. The attenuation

level is given by:

When all 7 bits of the ATT_DATA word are high

(ATT_DATA = 127), attenuation is infinite and the output

of PCM1710 will be zero.

MODE

TABLE VII. Serial-Mode Control Input Format (Pin 24 [MODE] = H)—Refer to Figure 6 for Timing Diagram.

MODE BY

L

H

H

ML

Attenuation

Mode

Mode 1

ATT_DATA

Mode 2

Bit#

MC

D6

L

L

D5

L

H

D4

DEEM2

D3

DEEM1

TST

IW

D2

IIR

D1

MUTE

LRPL

D0

DSD

IIS

B0

B1

B2

B4

B5

B6

B7

B3

MD

NOTE: Cycle Time for Model Control—Cycle time for mode control must be set over 128 times of minimum system clock.

OFF

OFF

OFF

ON

16-Bit

Normal