5-1

FAST AND LS TTL DATA

4-STAGE PRESETTABLE

RIPPLE COUNTERS

The SN54/74LS196 decade counter is partitioned into divide-by-two and di-

vide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1)

sequence or in a bi-quinary mode producing a 50% duty cycle output. The

SN54/74LS197 contains divide-by-two and divide-by-eight sections which

can be combined to form a modulo-16 binary counter. Low Power Schottky

technology is used to achieve typical count rates of 70 MHz and power dis-

sipation of only 80 mW.

Both circuit types have a Master Reset (MR) input which overrides all other

inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL)

overrides clocked operations and asynchronously loads the data on the Par-

allel Data inputs (Pn) into the flip-flops. This preset feature makes the circuits

usable as programmable counters. The circuits can also be used as 4-bit

latches, loading data from the Parallel Data inputs when PL is LOW and stor-

ing the data when PL is HIGH.

CONNECTION DIAGRAM DIP (TOP VIEW)

14

13

12

11

10

9

1234

56

8

7

VCC

MR

Q3

P3

P1

Q1

CP0

PL

Q2

P2

P0

Q0

CP1

GND

NOTE:

The Flatpak version

has the same pinouts

(Connection Diagram) as

the Dual In-Line Package.

PIN NAMES

LOADING (Note a)

HIGH

LOW

CP0

Clock (Active LOW Going Edge)

1.0 U.L.

1.5 U.L.

Input to Divide-by-Two Section

CP1 (LS196)

Clock (Active LOW Going Edge)

2.0 U.L.

1.75 U.L.

Input to Divide-by-Five Section

CP1 (LS197)

Clock (Active LOW Going Edge)

1.0 U.L.

0.8 U.L.

Input to Divide-by-Eight Section

MR

Master Reset (Active LOW) Input

1.0 U.L.

0.5 U.L.

PL

Parallel Load (Active LOW) Input

0.5 U.L.

0.25 U.L.

P0–P3

Data Inputs

0.5 U.L.

0.25 U.L.

Q0–Q3

Outputs (Notes b, c)

10 U.L.

5 (2.5) U.L.

NOTES:

a. 1 TTL Unit Load (U.L.) = 40

µA HIGH/1.6 mA LOW.

b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)

c. In addition to loading shown, Q0 can also drive CP1.

SN54/74LS196

SN54/74LS197

4-STAGE PRESETTABLE

RIPPLE COUNTERS

LOW POWER SCHOTTKY

J SUFFIX

CERAMIC

CASE 632-08

N SUFFIX

PLASTIC

CASE 646-06

14

1

14

1

ORDERING INFORMATION

SN54LSXXXJ

Ceramic

SN74LSXXXN

Plastic

SN74LSXXXD

SOIC

14

1

D SUFFIX

SOIC

CASE 751A-02

LOGIC SYMBOL

CP0

CP1

PL

MR

P0

Q0

P1 P2 P3

Q1 Q2 Q3

1

4 10 3 11

12

2

9

5

13

6

8

VCC = PIN 14

GND = PIN 7