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SN54LS192 Datasheet(PDF) 6 Page - Motorola, Inc

Part No. SN54LS192
Description  PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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SN54LS192 Datasheet(HTML) 6 Page - Motorola, Inc

   
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FAST AND LS TTL DATA
SN54/74LS192
• SN54/74LS193
AC SETUP REQUIREMENTS (TA = 25°C)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tW
Any Pulse Width
20
ns
VCC = 5.0 V
ts
Data Setup Time
20
ns
VCC = 5.0 V
th
Data Hold Time
5.0
ns
VCC = 5.0 V
trec
Recovery Time
40
ns
DEFINITIONS OF TERMS
SETUP TIME (ts) is defined as the minimum time required for
the correct logic level to be present at the logic input prior to the
PL transition from LOW-to-HIGH in order to be recognized and
transferred to the outputs.
HOLD TIME (th) is defined as the minimum time following the
PL transition from LOW-to-HIGH that the logic level must be
maintained at the input in order to ensure continued recogni-
tion. A negative HOLD TIME indicates that the correct logic
level may be released prior to the PL transition from
LOW-to-HIGH and still be recognized.
RECOVERY TIME (trec) is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH data to the Q outputs.


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