Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

LD1048 Datasheet(PDF) 13 Page - LDT Co., Ltd

Part No. LD1048
Description  48 Channel Output LED DRIVER
Download  27 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  LDT [LDT Co., Ltd]
Homepage  http://www.ldt.co.kr/
Logo 

LD1048 Datasheet(HTML) 13 Page - LDT Co., Ltd

Zoom Inzoom in Zoom Outzoom out
 13 / 27 page
background image
13/26
LD71D1048C
SD-2003A
10 bit PWM controller / 48 Channel Output LED DRIVER
SYSTEM INTERFACE
SCKENEnable Input
if SCKEN is high, LD71D1048C receive SCKIN signal and DIN<9:0>
• STENB enables STINB.
If STENB is Low , LD71D1048C receive STINB and Transfer Shift register Data to Memory
• Output Enable Input
The LD71D1048C has 3 output enable pin (OEB_R, OEB_G, OEB_B). If the OEB = 1, output are off
and if OEB = 0 then all output pins are PWM output. Refer to timing diagram.
• Data Input / Output
The LD71D1048C has 10bit data input pins (DIN[9:0]) and 10Bit data output pins (DOUT[9:0]).
The output data is out after 48 times SCKIN from input data. If DOUT[9:0] pins are connected
to next device DIN[9:0] pins, the first device 48bit input data can shift the next device 48bit input
data by SCKIN. It can transfer display data to serial method so it makes device to connect directly.
The 10Bit input data are inputted 10Bit COUT1 and next 10Bit COUT2 and next 10Bit COUT3 …
COUT48 input data by SCKIN. Refer to timing diagram.
• PWM Function
The LD71D1048C has 10 bit PWM function. PWM 10 bit data is received by DIN[9:0] pins.
It can control LED driver brightness by 1024 gray scale. Refer to column driver timing diagram.
• Row Control
The LD71D1048C has 16 bit row control pins ( ROUT[16:1]). The signal of row controller
is using for scanning. RIN_OUT pin is “L”, ROUT signals are generated by internal clock. If RIN_OUT
pin is “H”, ROUT signals are generated by RAD0 ~ RAD3 and ROUT[16:1] signals are available .
If RIN_OUT pin is “L” and P8_16 is “L”, ROUT[8:1] signals are available. P8_16 is “H”, ROUT[16:1]
signals are available. Refer to row driver timing diagram.
• SRAM Function
The LD71D1048C has 7,680 bits SRAM memory. The 7,680 bits SRAM store 10 bits PWM data
of 16 row and 48 column. Refer to timing diagram.
• ROUT Monitor Function
This is display off function when ROUT signal are halted at 0.3 second if ROUT is not change during 0.3 sec.
It is including watch dog timer in the LD71D1048C.
• RC Oscillation
The LD71D1048C is consisted of internal RC oscillation circuit. So oscillation frequency is
changed by external resistor . The external resistor is connected with OSC1,OSC2 pins.
Refer to RC Oscillation diagram.
FUNCTIONAL DESCRIPTION


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn