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LD1048 Datasheet(PDF) 5 Page - LDT Co., Ltd |
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LD1048 Datasheet(HTML) 5 Page - LDT Co., Ltd |
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5 / 27 page  5/26 LD71D1048C SD-2003A 10 bit PWM controller / 48 Channel Output LED DRIVER PIN NAME DESCRIPTION VDD 5V Power supply terminal. GND GND terminals for LED Drivers and control logic. All GND terminals must be connected to GND level. Do not leave any GND terminal to NC. DIN0 ~ DIN9 Data input terminals for 10Bit R, G, B data. Shift register accepts R, G, B data from these terminals. (at rising edge of SCKIN) DOUT0 ~ DOUT9 Output terminals of shift register output data for next DIN9 ~ DIN0 terminals. RESETB Reset input terminal (Low active). This Pin reset all register except RAM Area. SCKIN Shift register clock input terminal. STINB Strobe signal input terminal. At falling edge of strobe signal, 48 channels of 10 bit data registers copy R, G, B data from shift register. STENB STINB enable signal input terminal (Low active). SCKEN SCKIN enable signal input terminal (High active). OEB_R OEB_G OEB_B Output enable signal input terminal. The device outputs data when OEB = “L”. When OEB = “H” all R, G, B output terminals hold high-impedance state. OEB_R, OEB_G, OEB_B work indepantant respectively. R pin : COUT1,4,7,10,13,16,19,22,25,28,31,34,37,40,43,46 G pin : COUT2,5,8,11,14,17,20,23,26,29,32,35,38,41,44,47 B pin : COUT3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48 OSC2 PWM generator reference clock output terminal. PIN No. (MQFP) 56, 121 8,7, 6, 5, 4, 3, 2,1 128,127 25,26,27,28 29,30,31,32, 33,34 99 126 125 97 98 35, 36, 37 38 OSC1 PWM generator reference clock input terminal. 39 SCKOUT Shift register clock out terminal. 24 STOUT Strobe signal output terminal. 100 PIN DESCRIPTION 11, 16, 21, 40, 43, 48, 53, 73, 76,81, 86, 108, 113, 118 |
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