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DAC7541A Datasheet(PDF) 5 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
Part No. DAC7541A
Description  Low Cost 12-Bit CMOS Four-Quadrant Multiplying DIGITAL-TO-ANALOG CONVERTER
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

DAC7541A Datasheet(HTML) 5 Page - Burr-Brown (TI)

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5
®
DAC7541A
DISCUSSION
OF SPECIFICATIONS
RELATIVE ACCURACY
This term (also known as linearity) describes the transfer
function of analog output to digital input code. The linearity
error describes the deviation from a straight line between
zero and full scale.
DIFFERENTIAL NONLINEARITY
Differential nonlinearity is the deviation from an ideal 1LSB
change in the output, from one adjacent output state to the
next. A differential nonlinearity specification of
±1.0LSB
guarantees monotonicity.
GAIN ERROR
Gain error is the difference in measure of full-scale output
versus the ideal DAC output. The ideal output for the
DAC7541A is –(4095/4096) X (V
REF). Gain error may be
adjusted to zero using external trims.
OUTPUT LEAKAGE CURRENT
The measure of current which appears at Out1 with the DAC
loaded with all zeros, or at Out2 with the DAC loaded with
all ones.
MULTIPLYING FEEDTHROUGH ERROR
This is the AC error output due to capacitive feedthrough
from VREF to Out1 with the DAC loaded with all zeros. This
test is performed at 10kHz.
OUTPUT CURRENT SETTLING TIME
This is the time required for the output to settle to a tolerance
of
±0.5LSB of final value from a change in code of all zeros
to all ones, or all ones to all zeros.
PROPAGATION DELAY
This is the measure of the delay of the internal circuitry and
is measured as the time from a digital code change to the
point at which the output reaches 90% of final value.
DIGITAL-TO-ANALOG GLITCH IMPULSE
This is the measure of the area of the glitch energy measured
in nV-seconds. Key contributions to glitch energy are digital
word-bit timing differences, internal circuitry timing differ-
ences, and charge injected from digital logic.
MONOTONICITY
Monotonicity assures that the analog output will increase or
stay the same for increasing digital input codes. The
DAC7541A is guaranteed monotonic to 12 bits.
POWER SUPPLY REJECTION
Power supply rejection is the measure of the sensitivity of
the output (full scale) to a change in the power supply
voltage.
FIGURE 1. Simplified DAC Circuit.
EQUIVALENT CIRCUIT ANALYSIS
Figures 2 and 3 show the equivalent circuits for all digital
inputs low and high, respectively. The reference current is
switched to IOUT 2 when all inputs are low and IOUT 1 when
inputs are high. The IL current source is the combination of
surface and junction leakages to the substrate; the
1/4096 current source represents the constant one-bit current
drain through the ladder terminal.
DYNAMIC PERFORMANCE
Output Impedance
The output resistance, as in the case of the output capaci-
tance, is also modulated by the digital input code. The
resistance looking back into the I
OUT 1 terminal may be
anywhere between 10k
Ω (the feedback resistor alone when
all digital inputs are low) and 7.5k
Ω (the feedback resistor
in parallel with approximately 30k
Ω of the R-2R ladder
network resistance when any single bit logic is high). The
static accuracy and dynamic performance will be affected by
this modulation. The gain and phase stability of the output
CIRCUIT DESCRIPTION
The DAC7541A is a 12-bit multiplying D/A converter
consisting of a highly stable thin-film R-2R ladder network
and 12 pairs of current steering switches on a monolithic
chip. Most applications require the addition of a voltage or
current reference and an output operational amplifier.
A simplified circuit of the DAC7541A is shown in Figure 1.
The R-2R inverted ladder binarily divides the input currents
that are switched between I
OUT 1 and IOUT 2 bus lines. This
switching allows a constant current to be maintained in each
ladder leg independent of the input code.
The input resistance at VREF (Figure 1) is always equal to
RLDR (RLDR is the R/2R ladder characteristic resistance and
is equal to value “R”). Since RIN at the VREF pin is constant,
the reference terminal can be driven by a reference voltage
or a reference current, AC or DC, of positive or negative
polarity.
Bit 12
(LSB)
10k
10k
20k
20k
10k
20k
20k
I
OUT 2
Bit 3
Bit 2
Bit 1
(MSB)
V
REF
20k
I
OUT 1
R
FB
Digital Inputs (DTL-/TTL-/CMOS-compatible)
Switches shown for digital inputs “HIGH”.
S
2
S
1
S
3
S
12


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