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PBSS4032SN Datasheet(PDF) 3 Page - NXP Semiconductors |
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PBSS4032SN Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 15 page PBSS4032SN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 13 October 2010 3 of 15 NXP Semiconductors PBSS4032SN 30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint. Per device Ptot total power dissipation Tamb ≤ 25 °C [1] -0.86 W [2] -1.4 W [3] -2.3 W Tj junction temperature - 150 °C Tamb ambient temperature −55 +150 °C Tstg storage temperature −65 +150 °C (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Per device: Power derating curves Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Tamb (°C) −75 175 125 25 75 −25 006aac278 1.0 2.0 3.0 Ptot (W) 0.0 (1) (3) (2) |
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