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UC329002 Datasheet(PDF) 7 Page - Texas Instruments |
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UC329002 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 28 page UCC29002 UCC29002/1 UCC39002 SLUS495H − SEPTEMBER 2001 − REVISED AUGUST 2007 7 www.ti.com FUNCTIONAL DESCRIPTION differential current sense amplifier (CS+, CS−, CSO) The UCC39002 features a high-gain and high-precision amplifier to measure the voltage across a low-value current sense resistor. Since the amplifier is fully uncommitted, the current sense gain is user programmable. The extremely low input offset voltage of the UCC39002 current sense amplifier makes it suitable to measure current information across a low value sense resistor. Furthermore, the input common mode range includes ground and the positive supply rail of the UCC39002 (VDD). Accordingly, the current sense resistor can be placed in the ground return path or in the positive output rail of the power supply VO as long as VO ≤ VDD. The current sense amplifier is not unity gain stable and must have a minimum gain of three. load share bus driver amplifier (CSO) This is a unity-gain buffer amplifier to provide separation between the load share bus voltage and the output of the current sense amplifier. The circuit implements an ideal diode with virtually 0 V forward voltage drop by placing the diode inside the feedback loop of the amplifier. The diode function is used to automatically establish the role of the master module in the system. The UCC39002 which is assigned to be the master uses the load share bus driver amplifier to copy its output current information on to the load share bus. All slave units, with lower output current levels by definition, have this “ideal diode” reversed biased (VCSO < VLS). Consequently, the VCSO and VLS signals will be separated. That allows the error amplifier of the UCC39002 to compare its respective module’s output current to the master module’s output current and make the necessary corrections to achieve a balanced current distribution. Since the bus is always driven by a single load share bus driver amplifier, the number of modules (n) are limited by the output current capability of the amplifier according to: n + 100 k W I OUT,MIN V LS,FULL_SCALE where 100 k Ω is the input impedance of the LS pin as shown in the block diagram, IOUT,MIN is given in the data sheet and VLS,FULL_SCALE is the maximum voltage on the load share bus at full load. Note that the number of parallel units can be increased by reducing the full scale bus voltage, i.e. by reducing the current sense gain. load share bus receiver amplifier (LS) The load share bus receiver amplifier is a unity gain buffer monitoring the load share bus voltage. Its primary purpose is to ensure that the load share bus is not loaded by the internal impedances of the UCC39002. The LS pin is already internally compensated and has an internal 15-kHz filter. Adding external capacitance, including stray capacitance, should be avoided to maintain stability. (1) |
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