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ONET3301PARGTTG4 Datasheet(PDF) 5 Page - Texas Instruments |
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ONET3301PARGTTG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 18 page ONET3301PA 155Mbps TO 3.3Gbps LIMITING AMPLIFIER SLLS603C − MARCH 2004 − REVISED OCTOBER 2005 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions MIN TYP MAX UNIT Supply voltage, VCC, VCCO 3 3.3 3.6 V Operating free-air temperature, TA −40 85 °C dc electrical characteristics over recommended operating conditions (unless otherwise noted), typical operating condition is at VCC = 3.3 V and TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC,VCCO Supply voltage 3 3.3 3.6 V ICC Supply current DISABLE = low (excludes CML output current) 32 40 mA VOD Differential data output voltage swing DISABLE = high 0.25 10 mVp−p VOD Differential data output voltage swing DISABLE = low 600 780 1200 mVp−p rIN, rOUT Data input/output resistance Single ended 50 Ω RSSI output voltage Input = 2 mVp−p, RRSSI ≥ 10 kΩ 100 mV RSSI output voltage Input = 80 mVp−p, RRSSI ≥ 10 kΩ 2800 mV RSSI linearity 20−dB input signal, VIN ≤ 80 mVpp ±3% ±8% V(IN_MIN) Data input sensitivity BER < 10–10 3 5 mVp−p V(IN_MAX) Data input overload 1200 mVp−p CMOS input high voltage 2.1 V CMOS input low voltage 0.6 V LOS high voltage ISINK = –30 µA 2.4 V LOS low voltage ISOURCE = 1 mA 0.4 V LOS hysteresis 223−1 PRBS (at 2.5 Gbps and 155 Mbps) 2.5 4.5 dB VTH LOS assert threshold range 223−1 PRBS (at 2.5 Gbps and 155 Mbps) 5−40 mVp−p ac electrical characteristics over recommended operating conditions (unless otherwise noted), typical operating condition is at VCC = 3.3 V and TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Low frequency −3-dB bandwidth COC = open 45 70 kHz Low frequency −3-dB bandwidth COC = 100 nF 0.8 kHz Data rate 3.3 Gb/s vNI Input referred noise 180 µVRMS K28.5 pattern at 3.3 Gbps 8.5 25 DJ Deterministic jitter, See Note 2 223−1 PRBS equivalent pattern at 2.7 Gbps 9.3 30 psp−p DJ Deterministic jitter, See Note 2 K28.5 pattern at 2.1 Gbps 7.8 25 psp−p 223−1 PRBS equivalent pattern at 155 Mbps 25 50 RJ Random jitter Input = 5 mVpp 6.5 psRMS RJ Random jitter Input = 10 mVpp 3 psRMS tr Output rise time 20% to 80% 60 85 ps tf Output fall time 20% to 80% 60 85 ps PSNR Power supply noise rejection f < 2 MHz 26 dB tDIS Disable response time 20 ns tLOS LOS assert/deassert time 2 100 µs NOTE 2: Deterministic jitter does not include pulse-width distortion due to residual small output offset voltage. |
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