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ATMEGA161-4PC Datasheet(PDF) 96 Page - ATMEL Corporation |
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ATMEGA161-4PC Datasheet(HTML) 96 Page - ATMEL Corporation |
96 / 134 page ATmega161(L) 96 The Store Program Memory (SPM) instruction can access the entire FLASH, but it can only be executed from the Boot Loader FLASH section. If no Boot Loader capability is needed, the entire FLASH is available for application code. The ATmega161 has two separate sets of Boot Lock Bits which can be set independently. This gives the user a unique flexibility to select different levels of protection. The user can select: • To protect the entire FLASH from a software update by the Boot Loader Program. • To only protect the Boot Loader section from a software update by the Boot Loader Program. • To only protect the Application code section from a software update by the Boot Loader Program. • Allowing software update in the entire FLASH See Table 36 and Table 37 for further details. The Boot Lock bits can be set in software and in Serial or Parallel Programming mode, but they can only be cleared by a chip erase command. Note: ’1’ means unprogrammed, ‘0’ means programmed Note: ’1’ means unprogrammed, ‘0’ means programmed Entering the Boot Loader Program Entering the Boot Loader takes place by a jump or call from the application program. This may be initiated by some trigger such as a command received via UART or SPI interface. Alternatively, the Boot Reset Fuse (BOOTRST) can be pro- grammed so that the reset vector is pointing to address $1E00 after a reset. In this case, the Boot Loader is started after the reset. After the application code is loaded, the program can start executing the application code. Note that the fuses cannot be changed by the MCU itself. This means that once the Boot Reset Fuse is programmed, the Reset Vector will always point to the Boot Loader Reset and the fuse can only be changed through the serial or parallel programming inter- face. The BOOTRST fuse can also be locked by programming LB1. When LB1 is programmed it is not possible to change the BOOTRST fuse unless a chip erase command is performed first. Note: ’1’ means unprogrammed, ‘0’ means programmed Table 36. Boot Lock Bit0 Protection modes (Application section) BLB0 mode BLB01 BLB02 Protection 1 1 1 No restrictions for SPM, LPM in the Application code section (address $0000 - $1DFF) 2 0 1 It is not allowed to update the Application code section (address $0000 - $1DFF) by SPM. 3 0 0 LPM read and SPM write prohibited in the Application code section (address $0000 - $1DFF) 41 0 It is not allowed to read program code located in the Application code section (address $0000 - $1DFF) by LPM Table 37. Boot Lock Bit1 Protection modes (Boot Loader section) BLB1 mode BLB11 BLB12 Protection 1 1 1 No restrictions for SPM, LPM in the Boot Loader section (address $1E00 - $1FFF) 2 0 1 It is not allowed to update the Boot Loader section (address $1E00 - $1FFF) by SPM 3 0 0 LPM and SPM prohibited in the Boot Loader section (address $1E00 - $1FFF) 41 0 It is not allowed to read program code located in the Boot Loader section (address $1E00 - $1FFF) by LPM Table 38. Boot Reset Fuse, BOOTRST BOOTRST Reset Address 1 Reset Vector = Application reset (address $0000) 0 Reset Vector = Boot Loader reset (address $1E00) |
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