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ADE7755 Datasheet(PDF) 14 Page - Analog Devices |
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ADE7755 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 20 page 
ADE7755 Rev. A | Page 14 of 20 Channel 2 (Voltage Channel) The output of the line voltage transducer is connected to the ADE7755 at this analog input. Channel 2 is a fully differential voltage input. The maximum peak differential signal on Channel 2 is ±660 mV. Figure 25 illustrates the maximum signal levels that can be connected to Channel 2 of the ADE7755. +660mV –660mV VCM V2 DIFFERENTIAL INPUT ±660mV MAX PEAK COMMON-MODE ±100mV MAX V2P V2N V2 VCM AGND Figure 25. Maximum Signal Levels, Channel 2 Channel 2 must be driven from a common-mode voltage, that is, the differential voltage signal on the input must be referenced to a common mode (usually AGND). The analog inputs of the ADE7755 can be driven with common-mode voltages of up to 100 mV with respect to AGND. However, best results are achieved using a common mode equal to AGND. TYPICAL CONNECTION DIAGRAMS Figure 26 shows a typical connection diagram for Channel 1. A current transformer (CT) is the current transducer selected for this example. Note that the common-mode voltage for Channel 1 is AGND and is derived by center-tapping the burden resistor to AGND. This provides the complementary analog input signals for V1P and V1N. The CT turns ratio and burden resistor Rb are selected to give a peak differential voltage of ±470 mV/gain at maximum load. V1P AGND ±470mV GAIN Rb Rf Rf CT NEUTRAL PHASE IP V1N Cf Cf Figure 26. Typical Connection for Channel 1 Figure 27 shows two typical connections for Channel 2. The first option uses a potential transformer (PT) to provide complete isolation from the power line. In the second option, the ADE7755 is biased around the neutral wire, and a resistor divider provides a voltage signal that is proportional to the line voltage. Adjusting the ratio of Ra, Rb, and VR is also a convenient way of carrying out a gain calibration on the meter. ±660mV Ra1 Rb1 VR1 V2P AGND Rf Rf PT NEUTRAL PHASE V2N Cf Cf ±660mV V2P Rf NEUTRAL PHASE V2N Cf Cf 1Ra >> Rb + VR Rb + VR = Rf Figure 27. Typical Connections for Channel 2 POWER SUPPLY MONITOR The ADE7755 contains an on-chip power supply monitor. The analog supply (AVDD) is continuously monitored by the ADE7755. If the supply is less than 4 V ± 5%, the ADE7755 resets. This is useful to ensure correct device startup at power-up and power- down. The power supply monitor has built-in hysteresis and filtering. These features give a high degree of immunity to false triggering due to noisy supplies. In Figure 28, the trigger level is nominally set at 4 V. The tolerance on this trigger level is about ±5%. The power supply and decoupling for the part should be such that the ripple at AVDD does not exceed 5 V ± 5%, as specified for normal operation. AVDD 5V 4V 0V TIME RESET ACTIVE RESET INTERNAL RESET Figure 28. On-Chip Power Supply Monitor |
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