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SMP08 Datasheet(PDF) 7 Page - Analog Devices

Part No. SMP08
Description  Octal Sample and Hold with Multiplexed Input
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SMP08 Datasheet(HTML) 7 Page - Analog Devices

   
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SMP08
–7–
REV. D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SMP08
13
14
15
12
1
2
4
5
3
16
6
7
8
9
10
11
+12V
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
3
15
1
5
16
17
4
+12V
+5V
REF02
+12V
VREFAVDD
VOA
VZ
GND
WR
CS
DAC8228
A
B
C
ADDRESS
DECODE
ADDRESS
BUS
DIGITAL
INPUTS
WR
DGND
INH
0.1µF
PIN 9
C
PIN 10
B
PIN 11
A
PIN 6
INH
CH
PIN
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
0
0
0
0
0
0
0
0
1
0
1
2
3
4
5
6
7
NONE
13
14
15
12
1
5
2
4
CHANNEL DECODING
Figure 18. 8-Channel Multiplexed D/A Converter
Do not apply signals to the SMP08 with power off unless the
input current is limited to less than 10 mA.
TYPICAL APPLICATIONS
AN 8-CHANNEL MULTIPLEXED D/A CONVERTER
Figure 18 illustrates a typical demultiplexing function of the
SMP08. It is used to sample-and-hold eight different output
voltages corresponding to eight different digital codes from a
D/A converter. The SMP08’s droop rate of 20 mV/s requires a
refresh once every 500 ms, before the voltage drifts beyond
1/2 LSB accuracy (1 LSB of an 8-bit DAC is equivalent to
19.5 mV out of a full-scale voltage of 5 V). For a 10-bit DAC
the refresh rate must be less than 120 ms, and, for a 12-bit
system, 31 ms. This implementation is very cost effective com-
pared to using multiple DACs as the number of output channels
increases.


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