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AT49F040 Datasheet(PDF) 2 Page - ATMEL Corporation

Part No. AT49F040
Description  4-Megabit 512K x 8 5-volt Only CMOS Flash Memory
Download  10 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT49F040 Datasheet(HTML) 2 Page - ATMEL Corporation

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Device Operation
READ: The AT49F040 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus
ERASURE: Before a byte can be reprogrammed, the
512K bytes memory array (or 496K bytes if the boot block
featured is used) must be erased. The erased state of the
memory bits is a logical “1". The entire device can be
erased at one time by using a 6-byte software code. The
software chip erase code consists of 6-byte load com-
mands to specific address locations with a specific data
pattern (please refer to the Chip Erase Cycle Waveforms).
After the software chip erase has been initiated, the device
will internally time the erase operation so that no external
clocks are required. The maximum time needed to erase
the whole chip is tEC. If the boot block lockout feature has
been enabled, the data in the boot sector will not be
BYTE PROGRAMMING: Once the memory array is
erased, the device is programmed (to a logical “0") on a
byte-by-byte basis. Please note that a data ”0" cannot be
programmed back to a “1"; only erase operations can con-
vert ”0"s to “1"s. Programming is accomplished via the in-
ternal device command register and is a 4 bus cycle op-
eration (please refer to the Command Definitions table).
The device will automatically generate the required inter-
nal program pulses.
The program cycle has addresses latched on the falling
edge of WE or CE, whichever occurs last, and the data
latched on the rising edge of WE or CE, whichever occurs
first. Programming is completed after the specified tBP cy-
Block Diagram
The optional 16K bytes boot block section includes a re-
programming write lock out feature to provide data integ-
rity. The boot sector is designed to contain user secure
code, and when the feature is enabled, the boot sector is
permanently protected from being reprogrammed.
Description (Continued)
cle time. The DATA polling feature may also be used to
indicate the end of a program cycle.
vice has one designated block that has a programming
lockout feature. This feature prevents programming of
data in the designated block once the feature has been
enabled. The size of the block is 16K bytes. This block,
referred to as the boot block, can contain secure code that
is used to bring up the system. Enabling the lockout fea-
ture will allow the boot code to stay in the device while data
in the rest of the device is updated. This feature does not
have to be activated; the boot block’s usage as a write
protected region is optional to the user. The address range
of the boot block is 00000H to 03FFFH.
Once the feature is enabled, the data in the boot block can
no longer be erased or programmed. Data in the main
memory block can still be changed through the regular
programming method. To activate the lockout feature, a
series of six program commands to specific addresses
with specific data must be performed. Please refer to the
Command Definitions table.
method is available to determine if programming of the
boot block section is locked out. When the device is in the
software product identification mode (see Software Prod-
uct Identification Entry and Exit sections) a read from ad-
dress location 00002H will show if programming the boot
block is locked out. If the data on I/O0 is low, the boot
block can be programmed; if the data on I/O0 is high, the
program lockout feature has been activated and the block
cannot be programmed. The software product identifica-
tion code should be used to return to standard operation.

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