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AT49BV4096 Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT49BV4096 Datasheet(HTML) 3 Page - ATMEL Corporation |
3 / 11 page If the boot block lockout has been enabled, the Chip Erase will not erase the data in the boot block; it will erase the main memory block and the parameter blocks only. After the chip erase, the device will return to the read or standby mode. SECTOR ERASE: As an alternative to a full chip erase, the device is organized into three sectors that can be indi- vidually erased. There are two 8K word parameter block sections and one sector consisting of the boot block and the main memory array block. The Sector Erase command is a six bus cycle operation. The sector address is latched on the falling WE edge of the sixth cycle while the 30H data input command is latched at the rising edge of WE. The sector erase starts after the rising edge of WE of the sixth cycle. The erase operation is internally controlled; it will automatically time to completion. When the boot block programming lockout feature is not enabled, the boot block and the main memory block will erase together (from the same sector erase command). Once the boot region has been protected, only the main memory array sector will erase when its sector erase command is issued. WORD PROGRAMMING: Once a memory block is erased, it is programmed (to a logical “0”) on a word-by- word basis. Programming is accomplished via the internal device command register and is a 4 bus cycle operation. The device will automatically generate the required inter- nal program pulses. Any commands written to the chip during the embedded programming cycle will be ignored. If a hardware reset happens during programming, the data at the location be- ing programmed will be corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase opera- tions can convert “0”s to “1”s. Programming is completed after the specified tBP cycle time. The DATA polling fea- ture may also be used to indicate the end of a program cycle. BOOT BLOCK PROGRAMMING LOCKOUT: The de- vice has one designated block that has a programming lockout feature. This feature prevents programming of data in the designated block once the feature has been enabled. The size of the block is 8K words. This block, referred to as the boot block, can contain secure code that is used to bring up the system. Enabling the lockout fea- ture will allow the boot code to stay in the device while data in the rest of the device is updated. This feature does not have to be activated; the boot block’s usage as a write protected region is optional to the user. The address range of the boot block is 00000H to 01FFFH. Once the feature is enabled, the data in the boot block can no longer be erased or programmed when input levels of 5.5V or less are used. Data in the main memory block can still be changed through the regular programming method. To activate the lockout feature, a series of six program commands to specific addresses with specific data must be performed. Please refer to the Command Definitions table. BOOT BLOCK LOCKOUT DETECTION: A software method is available to determine if programming of the boot block section is locked out. When the device is in the software product identification mode (see Software Prod- uct Identification Entry and Exit sections) a read from ad- dress location 00002H will show if programming the boot block is locked out. If the data on I/O0 is low, the boot block can be programmed; if the data on I/O0 is high, the program lockout feature has been enabled and the block cannot be programmed. The software product identifica- tion exit code should be used to return to standard opera- tion. BOOT BLOCK PROGRAMMING LOCKOUT OVER- RIDE: The user can override the boot block programming lockout by taking the RESET pin to 12 ± 0.5 volts. By doing this protected boot block data can be altered through a chip erase, sector erase or word programming. When the RESET pin is brought back to TTL levels the boot block programming lockout feature is again active. PRODUCT IDENTIFICATION: The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external pro- grammer to identify the correct programming algorithm for the Atmel product. For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT49BV4096/LV4096 features DATA polling to indicate the end of a program cycle. Dur- ing a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. During a chip or sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the program or erase cycle has completed, true data will be read from the device. DATA polling may begin at any time during the program cycle. TOGGLE BIT: In addi ti on t o DATA po ll ing the AT49BV4096/LV4096 provides another method for deter- mining the end of a program or erase cycle. During a pro- gram or erase operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle. HARDWARE DATA PROTECTION: Hardware features pr otect ag ai nst i n a d ve r t e n t p r og r a m s t o th e AT49BV4096/LV4096 in the following ways: (a) VCC AT49BV/LV4096 3 |
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