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AT29C1024-70JI Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT29C1024-70JI Datasheet(HTML) 3 Page - ATMEL Corporation |
3 / 12 page Temperature Under Bias................. -55 °C to +125°C Storage Temperature...................... -65 °C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ................... -0.6V to +6.25V All Output Voltages with Respect to Ground .............-0.6V to VCC + 0.6V Voltage on OE with Respect to Ground ................... -0.6V to +13.5V *NOTICE: Stresses beyond those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi- cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings* After setting SDP, any attempt to write to the device with- out the 3-word command sequence will start the internal write timers. No data will be written to the device; however, for the duration of tWC, a read operation will effectively be a polling operation. After the software data protection’s 3-word command code is given, a sector of data is loaded into the device using the sector programming timing specifications. HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs to the AT29C1024 in the following ways: (a) VCC sense— if VCC is below 3.8V (typical), the program function is inhibited. (b) VCC power on delay— once VCC has reached the VCC sense level, the device will automatically time out 5 ms (typical) before programming. (c) Program inhibit— holding any one of OE low, CE high or WE high inhibits program cycles. (d) Noise filter— pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a program cycle. PRODUCT IDENTIFICATION: The product identifica- tion mode identifies the device and manufacturer as At- mel. It may be accessed by hardware or software opera- tion. The hardware operation mode can be used by an ex- ternal programmer to identify the correct programming al- gorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part (i.e. using the device code), and have the system software use the appropriate sector size for program op- Device Operation (Continued) erations. In this manner, the user can have a common board design for various Flash densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size. For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT29C1024 features DATA poll- ing to indicate the end of a program cycle. During a pro- gram cycle an attempted read of the last word loaded will result in the complement of the loaded data on I/O7 and I/O15. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time during the program cycle. TOGGLE BIT: In addition to DATA p o l l i n g t h e AT29C1024 provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 and I/O14 toggling between one and zero. Once the program cycle has completed, I/O6 and I/O14 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time dur- ing a program cycle. OPTIONAL CHIP ERASE MODE: The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details. AT29C1024 4-143 |
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