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CAT24C128ZI-GT3 Datasheet(PDF) 2 Page - ON Semiconductor |
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CAT24C128ZI-GT3 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 16 page CAT24C128 http://onsemi.com 2 Table 1. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units Storage Temperature −65 to +150 °C Voltage on Any Pin with Respect to Ground (Note 1) −0.5 to +6.5 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2) Symbol Parameter Min Units NEND (Notes 3, 4) Endurance 1,000,000 Program / Erase Cycles TDR Data Retention 100 Years 2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 3. Page Mode, VCC = 5 V, 25°C 4. The new product revision (C) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte has to be written, 4 bytes (including the ECC bits) are re−programmed. It is recommended to write by multiple of 4 bytes in order to benefit from the maximum number of write cycles. Table 3. D.C. OPERATING CHARACTERISTICS − Mature Product (Rev B) (VCC = 1.8 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.) Symbol Parameter Test Conditions Min Max Units ICCR Read Current Read, fSCL = 400 kHz 1 mA ICCW Write Current Write, fSCL = 400 kHz 3 mA ISB Standby Current All I/O Pins at GND or VCC TA = −40°C to +85°C 1 mA TA = −40°C to +125°C 2 IL I/O Pin Leakage Pin at GND or VCC TA = −40°C to +85°C 1 mA TA = −40°C to +125°C 2 VIL Input Low Voltage −0.5 VCC x 0.3 V VIH Input High Voltage VCC x 0.7 VCC + 0.5 V VOL1 Output Low Voltage VCC ≥ 2.5 V, IOL = 3.0 mA 0.4 V VOL2 Output Low Voltage VCC < 2.5 V, IOL = 1.0 mA 0.2 V Table 4. PIN IMPEDANCE CHARACTERISTICS − Mature Product (Rev B) (VCC = 1.8 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.) Symbol Parameter Conditions Max Units CIN (Note 5) SDA I/O Pin Capacitance VIN = 0 V 8 pF CIN (Note 5) Input Capacitance (other pins) VIN = 0 V 6 pF IWP (Note 6) WP Input Current VIN < VIH 200 mA VIN > VIH 1 mA 5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 6. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively strong; therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To conserve power, as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak current source. |
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