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AS3606 Datasheet(PDF) 29 Page - ams AG

Part No. AS3606
Description  System PMU with HV Back Light Driver
Download  71 Pages
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Maker  AMSCO [ams AG]
Homepage  http://www.ams.com
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AS3606 Datasheet(HTML) 29 Page - ams AG

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www.austriamicrosystems.com
Revision 1.03
28 - 70
AS3606 AS3607 2v2
Data Sheet - D e t a i l e d D e s c r i p t i o n - S Y S T E M F u n c t i o n s
9.4 Interrupt Generation
All interrupt sources can get enabled or disabled by corresponding bits in the 4 IRQ-bytes. By default no interrupt source is enabled.
The XIRQ pin can be configured to operate in push/pull (2 different driver strengths), open-drain mode or to be tri-state. The signal polarity can
be defined as active-low or active-high. Default state is open-drain active-low.
9.4.1 IRQ Source Interpretation
There are 3 different modules to process interrupt sources:
LEVEL. The IRQ output is kept active as long as the interrupt source is present and this IRQ-Bit is enabled.
EDGE. The IRQ gets active with a high going edge of this source. The IRQ stays active until the corresponding IRQ-Register gets read.
STATUS CHANGE. The IRQ gets active when the source-state changes. The change bit and the status can be read to notice which interrupt
was the source. The IRQ stays active until the corresponding interrupt register gets read.De-bouncer
There is a de-bounce function implemented, a de-bounce time of 3ms is selected per default in the IRQ_ENRD_3 register (26h).
9.4.2 Interrupt Sources
These IRQ events will activate the XIRQ pin:
10bit ADC end of conversion
Charger end of charge, connect/disconnect, no battery
Battery temperature high (at 45ºC or 50ºC with 100/10k
Ω NTC)
Junction temperature high
Battery low (Brown-out voltage reached)
Power-up key (pin PWRUP) pressed
Current sink low voltage
Power rail monitor: over-voltage CVDD1, CVDD2, CVDD3
Power rail monitor: under-voltage CVDD1, CVDD2, CVDD3, VDD27


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