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AS3606 Datasheet(PDF) 28 Page - ams AG |
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AS3606 Datasheet(HTML) 28 Page - ams AG |
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www.austriamicrosystems.com Revision 1.03 27 - 70 AS3606 AS3607 2v2 Data Sheet - D e t a i l e d D e s c r i p t i o n - S Y S T E M F u n c t i o n s 9.2 Hibernation Hibernation allows shutting down a part or the complete system. Hibernation can be terminated by every possible interrupt of the PMU. The interrupt has to be enabled before going to hibernation. 9.3 Supervisor This supervisor function can be used for automatic detection of VSUP brown out or junction over-temperature condition. 9.3.1 VSUP Supervision The VSUP supervision has a selectable level. If the shutdown is not enabled an interrupt can be generated. 9.3.2 VDD27 Supervision If VDD27 reaches the “programmed level of VDD27” -10% for typ. 3ms, the PMU shuts down automatically. If the shutdown is not enabled an interrupt can be generated. 9.3.3 Junction Temperature Supervision The temperature supervision level can also be set by 5 bits (120 to –15ºC). If the temperature reaches this level, an interrupt can be generated. The over-temperature shutdown level is always 20ºC higher. This shutdown can be disabled in Reg. 20h. 9.3.4 Power Rail Monitoring The 3 DCDC regulators have an extra monitor which observes the output voltage of the regulators. This power rail monitors are independent from the 10bit ADC. To activate these please see related registers. For a shut down the voltage of the regulator has to be 10% or more below the programmed value for more than 3ms. Table 11. Hibernation State Description Enter via GPIO To enter hibernation mode the following settings have to be done: - Enable just these IRQ sources which should lead to leave hibernation mode. - Make sure that IRQ is inactive (IRQ flags get cleared by Reg 23h-26h readings. - Set the GPIO to input - Select the GPIO for hibernation control (GPIO_DIMM_HBN_SEL <1:0>) - Enable hibernation via GPIO (GPIO_HBN_ON) - Define which regulators should be kept powered and enter hibernation by writing to Reg 1Ch_0x04 + Reg 17h-4. This register MUST NOT be read back!!! - Drive the selected GPIO to LOW. Note that hibernation will shutdown regulators which are not in the keep list of the mentioned Reg 17h-4 writing and are part of the power-up sequence. Enter via SW To enter hibernation mode the following settings have to be done: - Enable just these IRQ sources which should lead to leave hibernation mode. - Make sure that IRQ is inactive (IRQ flags get cleared by Reg 23h-26h readings. - Set a delay for entering hibernation if needed (HBN_DELAY<1:0>) - Define which regulators should be kept powered and enter hibernation by writing to Reg 1Ch_0x04 + Reg 17h-4. This register MUST NOT be read back.!!! Note that hibernation will shutdown regulators which are not in the keep list of the mentioned Reg 17h-4 writing and are part of the power-up sequence. Hibernation VDD27 chip supply is kept ON All other regulators are switched OFF dependent on the KEEP-Bits XRES goes active (can be disabled in the boot ROM) and PWRGOOD goes inactive Leave The chip will come out of Hibernation with - IRQ activation or -GPIO control Start-Up sequence is provided defined by the boot ROM. |
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